Conference papers and presentations

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Wei-Han Yu, Xingqiang Peng, Pui In Mak, R. P. Martins, “Student Research Preview,”

IEEE International Solid-State Circuits Conference (ISSCC)

Session 3, Paper No. 2 Feb-2016
Ka-Meng Lei, Hadi Heidari, Pui In Mak, Man-Kay Law, Franco Maloberti, R. P. Martins, A Handheld 50pM-Sensitivity Micro-NMR CMOS Platform with B-Field Stabilization for Multi-Type Biological/Chemical Assays

IEEE International Solid-State Circuits Conference (ISSCC), Digest

pp. 474-475 Feb-2016
Jun Yin, Pui In Mak, Franco Maloberti, R. P. Martins, A 0.003mm2 1.7-to-3.5GHz Dual-Mode Time-Interleaved Ring-VCO Achieving 90-to-150kHz 1/f3 Phase Noise Corner

IEEE International Solid-State Circuits Conference (ISSCC), Digest

pp. 48-49 Feb-2016
Gengzhen Qi, Pui In Mak, R. P. Martins, A 0.038mm2 SAW-less Multi-Band Transceiver Using an N-Path SC Gain Loop

IEEE International Solid-State Circuits Conference (ISSCC), Digest.

pp. 452-453 Feb-2016
Chio-In Ieong, Mingzhong Li, Man-Kay Law, Pui In Mak, Mang I Vai, R. P. Martins, “Student Research Preview,”

IEEE International Solid-State Circuits Conference (ISSCC)

Session 2, Paper No. 3 Feb-2016
Chio-In Ieong, Pui In Mak, Mang I Vai, R. P. Martins, Sub-µW QRS Detection Processor Using Quadratic Spline Wavelet Transform and Maxima Modulus Pair Recognition for Power-Efficient Wireless Arrhythmia Monitoring

Asia and South Pacific Design Automation Conference (ASP-DAC)

Jan-2016
Chak Fong Cheang, Ka-Fai Un, Pui In Mak, R. P. Martins, Time-Domain I/Q-LOFT Compensator Using a Simple Envelope Detector for a Sub-GHz IEEE 802.11af WLAN Transmitte

Asia and South Pacific Design Automation Conference (ASP-DAC)

Jan-2016
Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui In Mak, Mang I Vai, Sio Hang Pun, R. P. Martins, Sub-threshold VLSI Logic Family Exploiting Unbalanced Pull-up/down Network, Logical Effort and Inverse-Narrow-Width Techniques

Asia and South Pacific Design Automation Conference (ASP-DAC)

Jan-2016
Bo Wang, Man-Kay Law, S. Mohamad, A. Bermak, A 2.2 µW 15b Incremental Delta-Sigma ADC with Output-Driven Input Segmentation

Asia and South Pacific Design Automation Conference (ASP-DAC)

Best Design Award Jan-2016
Jianwei Lui, Chi Hang Chan, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 89fJ-FOM 6-bit 3.4GS/s flash ADC with 4x time-domain interpolation

IEEE Asian Solid-State Circuits Conference (A-SSCC), 2015

pp.1-4 Nov-2015
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