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Conference papers and presentations

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Category: Conference papers and presentations Total: 526
Fangyu Mao, Yan Lu, Seng-Pan U, R. P. Martins, A 6.78 MHz active voltage doubler with near-optimal on/off delay compensation for wireless power transfer systems

International Symposium on VLSI Design, Automation and Test (VLSI-DAT)

 Apr-2018
Xiaofei Ma, Yan Lu, R. P. Martins, Qiang Li, A 0.4V 430nA quiescent current NMOS digital LDO with NAND-based analog-assisted loop in 28nm CMOS

2018 IEEE International Solid - State Circuits Conference - (ISSCC)

 Feb-2018
Yang Xiaofeng, Yan Zhu, Chi Hang Chan, Wang GuanCheng, Seng-Pan U, A 430frms 2.4GHz Ring-Oscillator PLL with Backend Discrete-Time Phase Noise Cancellation Achieving 240.5dB Jitter-FoM

IEEE International Solid-State Circuits Conference (ISSCC 2018)

 [Student Research Preview] Feb-2018
Jiaji Mao, Mingqiang Guo, Sai Weng Sin, R. P. Martins, A 14-bit Split Pipeline ADC with Self-Adjusted Opamp-Sharing Duty Cycle

IEEE International Solid-State Circuits Conference – ISSCC 2018

 Ph.D. Student Research Preview - Session 3, Paper No.7 Feb-2018
Fangyu Mao, Yan Lu, Seng-Pan U, R. P. Martins, A reconfigurable cross-connected wireless-power transceiver for bidirectional device-to-device charging with 78.1% total efficiency

2018 IEEE International Solid - State Circuits Conference - (ISSCC)

 Feb-2018
JIANG Yang, Man-Kay Law, Pui In Mak, R. P. Martins, A 0.22-to-2.4V-Input Fine-Grained Fully-Integrated Rational Buck-Boost SC DC-DC Converter Using Algorithmic Voltage-Feed-In (AVFI) Topology Archiving 84.1% Peak Efficiency at 13.2μW/mm2

IEEE Int. Solid-State Circuit Conference (ISSCC), Digest of Technical Papers

 accepted and [Invited Special Issue in JSSC], pp. 422-423 Feb-2018
Jun Yin, S. Yang, H. Yi, Wei-Han Yu, Pui In Mak, R. P. Martins, A 0.2V Energy-Harvesting BLE Transmitter with a Micropower Manager Achieving 25% System Efficiency at 0dBm Output and 5.2nW Sleep Power in 28nm CMOS

Digest of Technical Papers from IEEE International Solid-State Circuits Conference – ISSCC 2018

 vol.61, pp.450-452 Feb-2018
Shiheng Yang, Jun Yin, Pui In Mak, R. P. Martins, A 0.0056mm2all-digital MDLL using edge re-extraction, dual-ring VCOs and a 0.3mW block-sharing frequency tracking loop achieving 292fsrmsJitter and −249dB FOM

2018 IEEE International Solid - State Circuits Conference - (ISSCC)

 [Invited Special Issue in JSSC] Feb-2018
Chee-Cheow Lim, Jun Yin, Pui In Mak, Harikrishnan Ramiah, R. P. Martins, An inverse-class-F CMOS VCO with intrinsic-high-Q 1st- and 2nd-harmonic resonances for 1/f2-to-1/f3 phase-noise suppression achieving 196.2dBc/Hz FOM

2018 IEEE International Solid - State Circuits Conference - (ISSCC)

 [Invited Special Issue in JSSC] Feb-2018
X. Zhong, A. Bermak, Chi-Ying Tsui, Man-Kay Law, Student Research Preview,

IEEE International Solid-State Circuit Conference (ISSCC)

 Feb-2018
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