Data Conversion and Signal Processing

A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation

2020 Mar 09 | Mon

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A 2.56mW 40MHz-Bandwidth 75dB-SNDR PartialInterleaving SAR-Assisted NS Pipeline ADC With Background Inter-Stage Offset Calibration

2020 Mar 09 | Mon

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A 4× Interleaved 10GS/s 8b Time-Domain ADC with 16× Interpolation-Based Inter-Stage Gain Achieving >37.5dB SNDR at 18GHz Input

2020 Mar 09 | Mon

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A 1.6GS/s 12.2mW 7/8-way Split Time-Interleaved SAR ADC achieving 54.2-dB SNDR with Digital Background Timing Mismatch Calibration

2020 Mar 01 | Sun

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A 76.6dB-SNDR 50MHz-BW 29.2mW Multibit CT Sturdy MASH with DAC Non-Linearity Tolerance

2020 Mar 01 | Sun

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A 5MHz-BW, 86.1dB-SNDR 4X Time-Interleaved 2nd-order ÄÓ Modulator with Digital Feedforward Extrapolation in 28nm CMOS

2020 Mar 01 | Sun

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A Temperature-Stabilized Single-Channel 1-GS/s 60-dB SNDR SAR-Assisted Pipelined ADC With Dynamic Gm-R-Based Amplifier

2020 Feb 01 | Sat

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A 12.5-MHz Bandwidth 77-dB SNDR SAR-Assisted Noise Shaping Pipeline ADC

2020 Feb 01 | Sat

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A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation

2020 Feb 01 | Sat

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A 2.56mW 40MHz-Bandwidth 75dB-SNDR PartialInterleaving SAR-Assisted NS Pipeline ADC With Background Inter-Stage Offset Calibration

2020 Feb 01 | Sat

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