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Jianyu Zhong

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Jianyu Zhong
鍾健瑜 Jianyu Zhong
Laboratory Technician (Administrative Officer)
Phone: (+853) 8822-4420
Room Number: N21-3003
  1. Yan Zhu, Chi Hang Chan, Zi Hao Zheng, Cheng Li, Jianyu Zhong, R. P. Martins, A 0.19 mm² 10 b 2.3 GS/s 12-Way Time-Interleaved Pipelined-SAR ADC in 65-nm CMOS

    IEEE Transactions on Circuits and Systems I: Regular Papers,

     pp 3606-3016 Nov-2018
  2. Wang GuanCheng, Cheng Li, Yan Zhu, Jianyu Zhong, Yan Lu, Chi Hang Chan, R. P. Martins, Missing-Code-Occurrence Probability Calibration Technique for DAC Nonlinearity With Supply and Reference Circuit Analysis in a SAR ADC

    IEEE Transactions on Circuits and Systems I: Regular Papers

     Vol.65, No.11, pp 3707 - 3719 Nov-2018
  3. Jianyu Zhong, Yan Zhu, Chi Hang Chan, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 12b 180MS/s 0.068mm2 with Full-Calibration-Integrated Pipelined-SAR ADC

    IEEE Transactions on Circuits and Systems I: Regular paper

     Vol.64, No 7, pp.1684-1695 Jul-2017
  4. Jianyu Zhong, Yan Zhu, Sai Weng Sin, Seng-Pan U, R. P. Martins, Thermal and Reference Noise Analysis of Time-Interleaving SAR and Partial-Interleaving Pipelined-SAR ADCs

    IEEE Transactions on Circuits and Systems I: Regular Papers

     vol.62, no.9, pp.2196-2206 Sep-2015
  5. Jianyu Zhong, Yanyan Liang, Ye Liu, A Novel Denoising Algorithm for Electrocardiogram Signals Based on Slantlet Transform

    Journal of System Simulation, pp. 6573-6576

     Oct-2009
  1. Jianyu Zhong, Yan Zhu, Chi Hang Chan, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 12b 180MS/s 0.068mm2 Pipelined-SAR ADC with Merged-residue DAC for Noise Reduction

    IEEE European Solid-State Circuits Conference – ESSCIRC 2016

     pp. 169-172 Sep-2016
  2. Jianyu Zhong, Yan Zhu, Chi Hang Chan, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 12b 180MS/s 0.068mm2 Full-Calibration Integrated Pipelined-SAR ADC

    International Solid State Circuits Conference (ISSCC)

     Student Research Previews Feb-2015
  3. Jianyu Zhong, Yan Zhu, Sai Weng Sin, Seng-Pan U, R. P. Martins, Inter-Stage Gain Error Self-Calibration of a 31.5fJ 10b 470MS/s Pipelined-SAR ADC

    IEEE Asian Solid-State Circuit Conference – (A-SSCC)

     pp 153-156 Nov-2012
  4. Jianyu Zhong, Yan Zhu, Sai Weng Sin, Seng-Pan U, R. P. Martins, Multi-Merged-Switched Redundant Capacitive DACs for 2b/cycle SAR ADC

    IEEE Midwest Symposium on Circuits and Systems – MWSCAS

     pp. 1-4 Aug-2011
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