Merit Paper Award (Design of a 1-V 10-bit 120-MS/s Current-Steering DAC with Transient-Improved Technique) 2014 Apr 11 | Fri ...
Merit Paper Award (Novel Timing-Skew-Insensitive, Multi-Phase Clock Generation Scheme For Parallel Dac And N-Path Filter) 2014 Apr 11 | Fri ...
Merit Paper Award (On-Chip Unsteady Reference Voltage Compensation Techniques for Very-High-Speed Pipelined ADC) 2014 Apr 11 | Fri ...
Selected Student Paper Scholarship (Paper Title I: Sai-Weng Sin, Seng-Pan U and R.P.Martins, “A Novel Low-Voltage Cross-Coupled Passive Sampling Branch for Reset- and Switched-Opamp Circuits”, Paper Title II: Sai-Weng Sin, Seng-Pan U and R.P.Martins, “A Novel Very Low-Voltage SC-CMFB Technique for Fully-Differential Reset-Opamp Circuits” ) 2014 Apr 11 | Fri ...
1st Runner-Up for the Final Year Project Supervised (A Pseudo-Differential Comparator-Based Pipelined ADC) 2014 Apr 10 | Thu ...
Chipidea Microelectronics Prize (Generalized Low-Voltage Circuit Design Techniques for Very High-Speed Time-Interleaved Pipelined ADC) 2014 Apr 10 | Thu ...
1st Runner-up (A Pseudo-Differential Comparator-Based Pipelined ADC with Common Mode Feedforward Technique) 2014 Apr 10 | Thu ...
