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WenLan Wu

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WenLan Wu
WenLan Wu
  1. Li Ding, WenLan Wu, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 13-bit 60M Split Pipelined ADC with Background Gain and Mismatch Error Calibration

    IEEE Asian Solid-State Circuit Conference – (A-SSCC),

     pp 77-80 Nov-2013
  2. WenLan Wu, Yan Zhu, U-Fat Chio, Li Ding, Chi Hang Chan, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 0.6V 8B 100MS/s SAR ADC with Minimized DAC Capacitance and Switching Energy in 65nm CMOS

    IEEE International Symposium on Circuits and Systems (ISCAS)

     pp 2239-2242 May-2013
  3. WenLan Wu, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 10-bit SAR ADC With Two Redundant Decisions and Splitted-MSB-Cap DAC Array

    IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

     pp 268-271 Dec-2012
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