Academic Qualifications
- Ph.D. in Electrical and Electronics Engineering, Faculty of Science and Technology, University of Macau, China (2014)
- M.Sc. in Electrical and Electronics Engineering, Faculty of Science and Technology, University of Macau, China (2009)
- B.Sc. in Electrical Engineering, National Taiwan University, Taiwan (2007)
Professional Experience
Institute of Microelectronics
- Assistant Professor, State-Key Lab. of Analog and Mixed-Signal VLSI, University of Macau (Feb. 2019 – Present)
State-Key Laboratory of Analog and Mixed-Signal VLSI
- Assistant Professor, State-Key Lab. of Analog and Mixed-Signal VLSI, University of Macau (Dec. 2018 – Feb. 2019)
- Macao Fellow (Lecturer), State-Key Lab. of Analog and Mixed-Signal VLSI, University of Macau (Dec. 2015 – Dec. 2018)
- Post-Doctoral Research Fellow, State-Key Lab. of Analog and Mixed-Signal VLSI, University of Macau (Aug. 2014 – Dec. 2015)
Others
- Visiting Scholar, University College Dublin, Ireland (Jan. 2017 – Dec. 2018)
Research
Research Interests
- RF, analog and mixed-signal CMOS integrated circuits
- Artificial Intelligence Analog Computation
Teaching Experience
B.Sc. Courses
- Circuit Analysis (ELEC231/ ECEB122)
- Signals and Systems (ELEC261)
- Telecommunications (ELEC361)
M.Sc. Courses
- Microelectronic Circuit Design (IMSE004)
Theses Supervision
Iat Fai SUN 2019-Present Analog Computation for Deep Learning
Feifei CHEN 2018-Present Analog Computation for Speech Recognition
Professional Review Services
IEEE Transactions on Circuits and Systems I: Regular Papers
IEEE Transactions on Circuits and Systems II: Express Briefs
IEEE International Symposium on Circuits and Systems – ISCAS
IEEE Asia Symposium on Quality in Electronic Design – ASQED
IEEE Asia Pacific Conference on Circuits and Systems – APCCAS
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Scientific and Technological R&D Award (PhD Student), Macau Science and Technology Award 2012
FDCT
Oct-2012 -
Certificate of Merit (DC-Offset-Compensated, CT/DT Hybrid Filter with Process-Insensitive Cutoff and Low In-Band Group-Delay Variation for WLAN Receivers)
IEEE Asia-Pacific Conference on Circuits and Systems – APCCAS’2008
Dec-2009
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Non-recursive digital calibration for joint-elimination of transmitter and receiver I/Q imbalances with minimized add-on hardware
Granted Number: 9,276,798
US Patent
Mar-2016 -
Wideband Driver Amplifier
Granted Number: 9,172,337
Application Number: 14/073,014
US Patent
Oct-2015 -
Poly-Phase Local Oscillator
Granted Number: 9,093,951
Application number: 14/073,060
US Patent Application
Jul-2015 -
Wireless Transmitter
Granted Number: 9,037,100
Application Number: 14/073,082
US Patent
May-2015
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A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancement
2021 IEEE Asian Solid-State Circuits Conference (A-SSCC)
IEEE ASSCC 2021, Session 7/ paper 7.3
Nov-2021 -
Time-Domain I/Q-LOFT Compensator Using a Simple Envelope Detector for a Sub-GHz IEEE 802.11af WLAN Transmitte
Asia and South Pacific Design Automation Conference (ASP-DAC)
Jan-2016 -
A wideband multi-stage inverter-based driver amplifier for IEEE 802.22 WRAN transmitters
pp.6-9
Aug-2013