Research Group

Yan Lu, Wing-Hung Ki, C. Patrick Yue, An NMOS-LDO Regulated Switched-Capacitor DC-DC Converter with Fast Response Adaptive Phase Digital Control

IEEE Transactions on Power Electronics

vol. 31, no. 2, pp. 1294-1303 Feb-2016

Chio-In Ieong, Mingzhong Li, Man-Kay Law, Pui In Mak, Mang I Vai, R. P. Martins, ISSCC Student Travel Grant Award

IEEE Solid-State Circuits Society (2016)

Feb-2016

Wei-Han Yu, Xingqiang Peng, Pui In Mak, R. P. Martins, ISSCC Student Travel Grant Award
 

IEEE Solid-State Circuits Society (2016)

Feb-2016

Ka-Meng Lei, Pui In Mak, Man-Kay Law, R. P. Martins, A-SSCC Distinguished Design Award
 

IEEE Asian Solid-State Circuits Conference (A-SSCC) (2015)

Feb-2016

Sujiang Rong, Jun Yin, Howard C. Luong, A 0.05-to-10GHz, 19-to-22GHz, and 38-to-44GHz Frequency Synthesizer for Software-Defined Radios in 0.13-mm CMOS Process

IEEE Transactions on Circuits and Systems II: Express Briefs

vol. 63, no. 1, pp. 109-113. Jan-2016

Zhicheng Lin, Pui In Mak, R. P. Martins, ZigBee Receiver Exploiting an RF-to-BB Current-Reuse Blixer and Hybrid Filter Topology

Granted Number: 9,237,055

US Patent

Jan-2016

Tianlan Chen, Yanwei Jia, Cheng Dong, Jie Gao, Pui In Mak, R. P. Martins, Sub-7-second genotyping of single-nucleotide polymorphism by high-resolution melting curve analysis on a thermal digital microfluidic device

Lab on a Chip

16, 743-752 Jan-2016

Chio-In Ieong, Pui In Mak, Mang I Vai, R. P. Martins, Sub-µW QRS Detection Processor Using Quadratic Spline Wavelet Transform and Maxima Modulus Pair Recognition for Power-Efficient Wireless Arrhythmia Monitoring

Asia and South Pacific Design Automation Conference (ASP-DAC)

Jan-2016

Chak Fong Cheang, Ka-Fai Un, Pui In Mak, R. P. Martins, Time-Domain I/Q-LOFT Compensator Using a Simple Envelope Detector for a Sub-GHz IEEE 802.11af WLAN Transmitte

Asia and South Pacific Design Automation Conference (ASP-DAC)

Jan-2016

Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui In Mak, Mang I Vai, Sio Hang Pun, R. P. Martins, Sub-threshold VLSI Logic Family Exploiting Unbalanced Pull-up/down Network, Logical Effort and Inverse-Narrow-Width Techniques

Asia and South Pacific Design Automation Conference (ASP-DAC)

Jan-2016