Type

Zushu Yan, Pui In Mak, Man-Kay Law, R. P. Martins, 0.0045mm2 15.8μW Three-Stage Amplifier Driving 10x-Wide (0.15 to 1.5nF) Capacitive Loads with >50° Phase Margin

IET Electronics Letters

vol. 51, pp. 454-456 Mar-2015

Haojuan Dai, Yan Lu, Man-Kay Law, Sai Weng Sin, Seng-Pan U, R. P. Martins, A Review and Design of the On-Chip Rectifiers for RF Energy Harvesting

IEEE International Wireless Symposium (IWS)

pp. 1-4 Mar-2015

Fujian Lin, Pui In Mak, R. P. Martins, Wideband Receivers: Design Challenges, Tradeoffs and State-of-the-Art

IEEE Circuits and Systems Magazine

vol. 15, Issue 1, pp. 12-24 Mar-2015

Zushu Yan, Pui In Mak, Man-Kay Law, R. P. Martins, Frequency Compensation Techniques for Low-Power and Small-Area Multistage Amplifiers

Granted Number: 8,963,639

Application Number: 13/770,020

US Patent

Feb-2015

Keng-Weng Lao, Man-Chung Wong, Ning-Yi Dai, Chi-Kong Wong, Chi-Seng Lam, A systematic approach to hybrid railway power conditioner design with harmonic compensation for high-speed railway

IEEE Transactions on Industrial Electronics

vol. 62, no. 2, pp. 930 – 942 Feb-2015

Chi Hang Chan, Yan Zhu, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 5.5mW 6b 5GS/S 4×-lnterleaved 3b/cycle SAR ADC in 65nm CMOS

Solid- State Circuits Conference - (ISSCC)

(Pre-doctoral achievement awards),pp1-3 Feb-2015

Yan Lu, Junmin Jiang, Wing-Hung Ki, C. Patrick Yue, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 123-Phase DC-DC Converter-Ring with Fast-DVS for Microprocessors

IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers (ISSCC)

pp. 364-365 Feb-2015

Junmin Jiang, Yan Lu, Cheng Huang, Wing-Hung Ki, Philip K. T. Mok, A 2-/3-Phase Fully-Integrated Switched-Capacitor DC-DC Converter in Bulk-CMOS for Energy-Efficient Digital Circuits With 14% Efficiency Improvement

IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers (ISSCC)

pp. 366-367 Feb-2015

Zhicheng Lin, IEEE SSCS Pre-doctoral Achievement Award 2015

IEEE Solid-State Circuits Society

Feb-2015

Zhicheng Lin, Pui In Mak, R. P. Martins, A 0.028mm2 11mW Single-Mixing Blocker-Tolerant Receiver with Double-RF N-Path Filtering, S11 Centering, +13dBm OB-IIP3 and 1.5-to-2.9dB NF

IEEE International Solid-State Circuits Conference (ISSCC), Digest.

Pre-doctoral achievement award, pp. 36-37 Feb-2015