Conference papers and presentations

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Jiang DongYang, Liang Qi, Sai Weng Sin, Franco Maloberti, R. P. Martins, A 5MHz-BW, 86.1dB-SNDR 4X Time-Interleaved 2nd-order ΔΣ Modulator with Digital Feedforward Extrapolation in 28nm CMOS

2020 Symposium on VLSI Circuits Digest of Technical Papers

Jun-2020
Guigang Cai, ChenChang Zhan, Yan Lu, A Fast-Transient-Response Fully-Integrated Digital LDO with Adaptive Current Step Size Control

IEEE International Symposium on Circuits and Systems (ISCAS)

Jun-2020
Xiu Yin Zhang, Jun-Hui Ou and Mo Huang, High-Efficiency Rectifiers with Wide Input Power Range and Application on Powering Wireless Sensors

2020 14th European Conference on Antennas and Propagation (EuCAP)

Mar-2020
Fangyu Mao, Yan Lu, Edoardo Bonizzoni, Filippo Boera, Mo Huang, Franco Maloberti, R. P. Martins, A Power-Efficient Hybrid Single-Inductor Bipolar-Output DC-DC Converter with Floating Negative Output for AMOLED Displays

CICC 2020

Mar-2020
Jiang DongYang, Liang Qi, Sai Weng Sin, Franco Maloberti, R. P. Martins, A 5MHz-BW, 86.1dB-SNDR 4X Time-Interleaved 2nd-order ÄÓ Modulator with Digital Feedforward Extrapolation in 28nm CMOS

CICC 2020

Mar-2020
Xiaoteng Zhao, Yong Chen, Pui In Mak, R. P. Martins, A 0.0285mm2 0.68pJ/bit Single-Loop Full-Rate Bang-Bang CDR without Reference and Separate Frequency Detector Achieving an 8.2(Gb/s)/µs Acquisition Speed of PAM-4 data in 28nm CMOS

IEEE Custom Integrated Circuits Conference (CICC)

Mar-2020
Yan Song, Yan Zhu, Chi Hang Chan, R. P. Martins, A 2.56mW 40MHz-Bandwidth 75dB-SNDR PartialInterleaving SAR-Assisted NS Pipeline ADC With Background Inter-Stage Offset Calibration

IEEE International Solid-State Circuits Conference (ISSCC)

pp.164-166 Feb-2020
Mo Huang, Yan Lu, R. P. Martins, A 2-Phase Soft-Charging Hybrid Boost Converter with Doubled-Switching Pulse Width and Shared Bootstrap Capacitor Achieving 93.5% Efficiency at a Conversion Ratio of 4.5

IEEE International Solid-State Circuits Conference (ISSCC)

pp. 198-200 Feb-2020
Minglei Zhang, Yan Zhu, Chi Hang Chan, R. P. Martins, A 4× Interleaved 10GS/s 8b Time-Domain ADC with 16× Interpolation-Based Inter-Stage Gain Achieving >37.5dB SNDR at 18GHz Input

IEEE International Solid-State Circuits Conference (ISSCC)

pp. 252-254 Feb-2020
Chao Fan, Jun Yin, Chee-Cheow Lim, Pui In Mak, R. P. Martins, A 9mW 54.9-to-63.5GHz Current-Reuse LO Generator with a 186.7dBc/Hz FoM by Unifying a 20GHz 3rd Harmonic-Rich Current-Output VCO, a Harmonic-Current Filter and a 60GHz TIA

IEEE International Solid-State Circuits Conference (ISSCC)

pp. 282-284 Feb-2020
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