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Data Conversion and Signal Processing

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Category: Data Conversion and Signal Processing Total: 481
Yan Zhu, Chi Hang Chan, Wong, S.-S., Seng-Pan U, R. P. Martins, Histogram-Based Ratio Mismatch Calibration for Bridge-DAC in 12-bit 120 MS/s SAR ADC

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

 Volume:24 , Issue: 3, pp. 1203 - 1207 Jun-2015
Chi Hang Chan, IEEE SSCS Pre-doctoral Achievement Award 2015

The IEEE Solid-State Circuits Society

 Feb-2015
Chi Hang Chan, Yan Zhu, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 5.5mW 6b 5GS/S 4×-lnterleaved 3b/cycle SAR ADC in 65nm CMOS

Solid- State Circuits Conference - (ISSCC)

 (Pre-doctoral achievement awards),pp1-3 Feb-2015
Yan Zhu, Chi Hang Chan, Seng-Pan U, R. P. Martins, Sampling front-end for analog to digital converter

Granted Number: 8,947,283

Application Number: 13/915,949

US patent

 Feb-2015
Jianyu Zhong, Yan Zhu, Chi Hang Chan, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 12b 180MS/s 0.068mm2 Full-Calibration Integrated Pipelined-SAR ADC

International Solid State Circuits Conference (ISSCC)

 Student Research Previews Feb-2015
Chi Hang Chan, IEEE SSCS Pre-doctoral Achievement Award 2015

The IEEE Solid-State Circuits Society

 Feb-2015
Yan Zhu, Chi Hang Chan, U-Fat Chio, Sai Weng Sin, Seng-Pan U, R. P. Martins, Franco Maloberti, Split-SAR ADCs: Improved Linearity With Power and Speed Optimization

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

 vol.22, no.2, pp.372,383 Feb-2014
Yan Zhu, Chi Hang Chan, Seng-Pan U, R. P. Martins, An 11b 900 MS/s Time-Interleaved Sub-ranging Pipelined-SAR ADC

IEEE European Solid-State Circuit Conference – (ESSCIRC)

 pp.211-214 Sep-2014
Seng-Pan U, Sai Weng Sin, Yan Zhu, Chi Hang Chan, U-Fat Chio, Second-Class Award in the Technological Invention Award Category(Research and Development of Comprehensive and Advanced Data Conversion Platforms in Nanometer CMOS Technology)

The Science and Technology Development Fund(FDCT)

 Nov-2014
Yan Zhu, Chi Hang Chan, Seng-Pan U, R. P. Martins, An 11b 900 MS/s Time-Interleaved Sub-ranging Pipelined-SAR ADC

IEEE European Solid-State Circuit Conference – (ESSCIRC)

 pp.211-214 Sep-2014
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