Data Conversion and Signal Processing

A 89fJ-FOM 6-bit 3.4GS/s flash ADC with 4x time-domain interpolation

2016 Feb 03 | Wed

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Thermal and Reference Noise Analysis of Time-Interleaving SAR and Partial-Interleaving Pipelined-SAR ADCs

2016 Feb 02 | Tue

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A 6 b 5 GS/s 4 Interleaved 3 b/Cycle SAR ADC

2016 Feb 01 | Mon

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Uniform Quantization Theory-Based Linearity Calibration for Split Capacitive DAC in an SAR ADC

2016 Jan 01 | Fri

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A 89fJ-FOM 6-bit 3.4GS/s flash ADC with 4x time-domain interpolation

2015 Nov 01 | Sun

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Split-SAR ADCs: Improved Linearity with Power and Speed Optimization

2015 Oct 28 | Wed

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Thermal and Reference Noise Analysis of Time-Interleaving SAR and Partial-Interleaving Pipelined-SAR ADCs

2015 Sep 01 | Tue

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Resolution-enhanced sturdy MASH delta–sigma modulator for wideband low-voltage applications

2015 Aug 26 | Wed

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Histogram-Based Ratio Mismatch Calibration for Bridge-DAC in 12-bit 120 MS/s SAR ADC

2015 Aug 17 | Mon

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A 5.5mW 6b 5GS/S 4×-lnterleaved 3b/cycle SAR ADC in 65nm CMOS

2015 Aug 17 | Mon

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