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Yang JIANG

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Yang JIANG
江洋 Yang JIANG
Year of Graduation: Jan 2019
Ph.D. Dissertation: Design of fully integrated fine-grained switched-capacitor DC-DC topologies in bulk CMOS
Current Appointment: Assistant Professor in the State Key Lab of Analog and Mixed-Signal VLSI, UM, Macao
  1. Yang JIANG, 2024 Best Associate Editor of IEEE TCAS-II

    2024 Best Associate Editor of IEEE TCAS-II

     Dec-2025
  2. Yang JIANG (Supervisor), Pre-Doctoral Achievement Award

    IEEE Solid-State Circuits Society (SSCS)

     Dec-2025
  3. Yang JIANG (Supervisor), AkroStar Academic Prize

    University of Macau

     Dec-2025
  4. Yang JIANG (Supervisor), ISCAS Predoctoral Student Travel Grant

    IEEE ISCAS

     Dec-2024
  5. Yang JIANG (Supervisor), Best Student Paper Nomination

    “A 96.7%-Efficient 2.5A Scalable DC DC Converter Module with Complementary Dual-Mode Reconfigurable Hybrid Topology Achieving Always Inductor Current Reduction Continuously Adjustable VCR Range and Interleaving COUT Augmentation,” 2024 IEEE CICC, Denver

     Dec-2024
  6. Yang JIANG (Supervisor), Best Paper Nomination Award

    “Adaptive Line-Transient Enhancement Techniques for Dual-Path Hybrid Converter Achieving Ultra-Low Output Overshoot/Undershoot,” 18th IEEE APCCAS, Shenzhen

     Dec-2024
  7. Yang JIANG (Supervisor), Student Travel Grant Award

    IEEE ISSCC

     Dec-2023
  8. Yang JIANG (Supervisor), AkroStar Academic Prize

    University of Macau

     Dec-2023
  9. Yang JIANG (Supervisor), AkroStar Academic Prize

    University of Macau

     Dec-2022
  10. Yang JIANG (Supervisor), Scientific and Technological R&D Award for Postgraduates (Master Rank)

    The Science and Technology Development Fund (FDCT), Macao

     Dec-2022
  11. Yang JIANG , Scientific and Technological R&D Award for Postgraduates (Ph.D.)

    The Science and Technology Development Fund (FDCT)

     Dec-2020
  12. Yang JIANG, Synopsys Academic Prize

    University of Macau

     Dec-2019
  13. Yang JIANG, Pre-Doctoral Achievement Award

    IEEE Solid-State Circuits Society (SSCS)

     Dec-2019
  1. Huihua Li, Qiaobo Ma, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui P. Martins, 基于双路径电源变换器的瞬态响应方法、电路及装置 No.202211404357.7 Mar-2026
  2. Jiahao Shi, Yang Jiang, Qiaobo Ma, Rui Martins, Pui-In Mak, Leyi Xu, 直流转换电路及直流转换装置 No.202510402955.8 Oct-2025
  3. Xinman Li, Xiongjie Zhang, Yang Jiang, Rui Martins, Pui-In Mak, Leyi Xu, 一种相位可控的升降压直流转换器 No.202510402958.1 Oct-2025
  4. Qiaobo MA, Xiongjie ZHANG, Yang JIANG, Man Kay Law,Pui In Mak, R.P. Martins, 直流转换器及电子设备 No.202210081945.5 Dec-2023
  1. Xiongjie Zhang, Anyang Zhao, Yang Jiang*, Makoto Takamiya, Rui P. Martins, Pui-In Mak, A 9-48V Input Multi-Mode Hybrid Buck Converter Achieving 98.94% Peak Efficiency and 2245.86W/in3 Power Density

    IEEE Transactions on Power Electronics (TPEL)

     early access, pp. 1-5 Mar-2026
  2. Jiahao Shi, Xuchu Mu, Qiaobo Ma, Yang Jiang*, Rui P Martins, Pui-In Mak, A Low-Voltage-CMOS AC–DC Converter With Series-Capacitor Pre-Regulation and Fine-Grained Capacitance Reallocation for Mains-Powered IoT

    IEEE Journal of Solid-State Circuits (JSSC)

     Vol. 61, No. 4 Jan-2026
  3. Chun-wang Zhuang, Xin Ming*, Yao Qin, Lin-min Chen, Zi-kai Ye, Yang Jiang, Bo Zhang, A Monolithic GaN Laser Diode Driver With Steep-Edge Driving Current for LiDAR Transmitters Using a 3× Self-Circulating Charge Pump

    IEEE Transactions on Power Electronics (TPEL)

     vol. 41, no. 4, pp. 4740-4755 Oct-2025
  4. Qiaobo Ma, Huihua Li, Xiongjie Zhang, Anyang Zhao, Yang Jiang*, Man-Kay Law, Rui P. Martins, Pui-In Mak, A Cross-Coupled Hybrid Switched-Capacitor Buck Converter With Extended Conversion Range and Enhanced DCR Loss Reduction

    IEEE Journal of Solid-State Circuits (JSSC)

     vol. 59, no. 10, pp. 3192-3203 Jul-2024
  5. Xiongjie Zhang, Anyang Zhao, Qiaobo Ma, Yang Jiang*, Man-Kay Law, Rui P. Martins, Pui-In Mak, A 24-V-Input Highly Integrated Interleaved-Inductor Multiple Step-Down Hybrid DC–DC Converter With Inherent Current Equalization Characteristics Publisher: IEEE Cite This PDF

    IEEE Journal of Solid-State Circuits (JSSC)

     vol. 59, no. 9, pp. 2895-2906 Apr-2024
  6. Yang Jiang, Man Kay Law , Pui In Mak, Rui P. Martins, Arithmetic Progression Switched-Capacitor DC-DC Converter Topology With Soft VCR Transitions and Quasi-Symmetric Two-Phase Charge Delivery

    IEEE Journal of Solid-State Circuits (JSSC)

     May-2022
  7. Man-Kay Law, Yang Jiang, Pui-In Mak, Rui P. Martins, Miniaturized Energy Harvesting Systems Using Switched-Capacitor DC-DC Converters

    IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), 2022

     Apr-2022
  8. Jieyun Zhang, Chongyao Xu, Man-Kay Law, Yang Jiang, Xiaojin Zhao, Pui-In Mak, Rui P. Martins, A 4T/Cell Amplifier-Chain-Based XOR PUF With Strong Machine Learning Attack Resilience

    IEEE Transactions on Circuits and Systems I

     vol. 69, pp. 366-377 Jan-2022
  9. Xiongjie Zhang, Qiaobo Ma, Yang Jiang, Man Kay Law, Pui In Mak, Rui P. Martins, A 12V-to-1V switched-capacitor-assisted hybrid converter with dual-path charge conduction and zero-voltage switching

    IEICE Electronics Express

    vol. 18, no. 22, pp. 1-5 Nov-2021
  10. Rui P. Martins; Pui-In Mak; Sai-Weng Sin; Man-Kay Law; Yan Zhu; Yan Lu; Jun Yin; Chi-Hang Chan; Yong Chen; Ka-Fai Un; Mo Huang; Minglei Zhang; Yang Jiang; Wei-Han Yu, Revisiting the Frontiers of Analog and Mixed-Signal Integrated Circuits Architectures and Techniques towards the future Internet of Everything (IoE) Applications

    Foundations and Trends in Integrated Circuits and Systems

     Volume 1, Issue 2-3 Nov-2021
  11. Jiangchao Wu, Hou-Man Leong, Ka-Chon Lei, Yang Jiang, Man Kay Law, Pui In Mak, Rui P. Martins, A Fully Integrated 10-V Pulse Driver Using Multiband Pulse-Frequency Modulation in 65-nm CMOS

    IEEE Transactions on VLSI Systems

     vol. 29, no.9, pp. 1665-1669 Sep-2021
  1. Xiongjie Zhang, Anyang Zhao, Xinman Li, Yang Jiang, Rui P. Martins and Pui-In Mak, An 80W Single-Inductor DC-DC Architecture for Simultaneous Flash Charging and Dual-Output PoL Supply with 92.1% Peak Efficiency from 15V-to-28V Input to 12.6V/3.3V/1V Outputs Using 1.3mm3 Inductor

    IEEE European Solid-State Electronics Research Conference (ESSERC)

     Sep-2024
  2. Xuchu Mu, Yang Jiang, Rui Martins and Pui-In Mak, A Fully Integrated 48-V GaN Driver Using Parallel-Multistep-Series Reconfigurable Switched-Capacitor Bank Achieving 7.7nC/mm2 On-Chip Bootstrap Driving Density

    IEEE Symposium on VLSI Technology and Circuits

     Jun-2024
  3. Guangshu Zhao, Chao Xie, Chenxi Wang, Yang Jiang, Milin Zhang, Pui-In Mak, Rui P. Martins and Man-Kay Law, A 63ns Flipping Time, 93.6% Voltage Flipping Efficiency Auto-Calibrated Ultrasonic Energy Harvesting Interface from −25 to 85°C

    IEEE Custom Integrated Circuits Conference (CICC)

     Apr-2024
  4. Qiaobo Ma, Huihua Li, Jiahao Shi, Yang Jiang, Rui Martins and Pui-In Mak, A Multi-Phase Multi-Path Hybrid Buck Converter for 9-48V to 0.8-1.2V Conversion with Improved DCR-Loss Reduction and Alleviated CFLY Current Gathering Achieving 88.3% Peak Efficiency and 176A/cm3Density

    IEEE Custom Integrated Circuits Conference (CICC)

     Apr-2024
  5. Huihua Li, Qiaobo Ma, Yang Jiang, Rui Martins and Pui-In Mak, A 96.7%-Efficient 2.5A Scalable DC-DC Converter Module with Complementary Dual-Mode Reconfigurable Hybrid Topology Achieving Always Inductor Current Reduction, Continuously Adjustable VCR Range, and Interleaving COUT

    IEEE Custom Integrated Circuits Conference (CICC)

     Apr-2024
  6. Qiaobo Ma, Yang Jiang, Huihua Li, Xiongjie Zhang, Man-Kay Law, Rui P. Martins and Pui-In Mak, A 12-28V to 0.6-1.8V Ratio-Regulatable Dickson SC Converter with Dual-Mode Phase Misalignment Operations Achieving 93.1% Efficiency and 6A Output

    IEEE International Solid-State Circuits Conference (ISSCC)

     Feb-2024
  7. Yang Jiang, Man-Kay Law, Pui-In Mak, Rui P. Martins, An Arithmetic Progression Switched-Capacitor DC-DC Converter with Soft VCR Transitions Achieving 93.7% Peak Efficiency and 400 Ma Output Current

    2021 IEEE Asian Solid-State Circuits Conference (A-SSCC), Session 2 / Paper 2.1

     Nov-2021
  8. Yang Jiang, Kim Fai Wong, ChenYan Cai, Sai Weng Sin, Seng-Pan U, R. P. Martins, A Reduced Jitter-Sensitivity Clock Generation Technique for Continuous-Time ΣΔ Modulators

    IEEE Asia Pacific Conference on Circuit and Systems (APCCAS)

     pp. 1011-1014 Dec-2010
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