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Weng Ieng Mok, Pui In Mak, Seng-Pan U, R. P. Martins, A Highly-Linear Successive-Approximation Front-End Digitizer with Built-in Sample-and-Hold Function for Pipeline/Two-Step ADC

in Proc. of the IEEE International Symposium on Circuits and Systems (ISCAS)

pp. 1947-1950 May-2007
Seng-Pan U, R. P. Martins, J.E.Franca, 超高頻多速開關電容電路設計

科學出版社

7030182499 Jan-2007
Ka Hou Ao Ieong, Seng-Pan U, R. P. Martins, A 1-V 2.5-mW Transient-Improved Current-Steering DAC using Charge-Removal-Replacement Technique

IEEE Asia Pacific Conference on Circuit and Systems (APCCAS)

pp. 183-186 Dec-2006
Sai Weng Sin, Seng-Pan U, R. P. Martins, Novel Timing-Skew-Insensitive, Multi-phase Clock Generation Scheme for Parallel DAC and N-Path Filter

Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2006

pp. 133-136 Jul-2006
Jun-Xia Ma, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 1.8V 1.056GS/s 6-b Flash-Interpolation ADC for MB-OFDM UWB Applications

Proceedings of RIUPEEEC (Macao, China)

pp. 105-108 Jul-2006
Weng Ieng Mok, Pui In Mak, Seng-Pan U, R. P. Martins, A Novel Architecture of Comparator-Mismatch-Free Multi-bit Pipeline ADC

Proceedings of the Regional Inter-University Postgraduate Electrical and Electronic Engineering Conference (RIUPEEEC), Session of Circuit and System

pp. 129-132 Jul-2006
Chon-In Lao, Seng-Pan U, R. P. Martins, An Expandable and Extendable High-Order Semi-MASH Sigma Delta Modulator

Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2006

pp. 68-73 Jul-2006
Ka Hou Ao Ieong, Seng-Pan U, R. P. Martins, Design of a 1-V 10-bit 120MS/s Current-Steering DAC with Transient-Improved Technique

Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2006

pp. 137-140 Jul-2006
Pui In Mak, Seng-Pan U, R. P. Martins, A 1V 14mW-per-Channel Flexible-IF CMOS Analog-Baseband IC for 802.11a/b/g Receivers

in IEEE Symposium on VLSI Circuits (VLSI), Digest of Technical Papers

pp. 288-289 Jun-2006
Jun-Xia Ma, Sai Weng Sin, Seng-Pan U, R. P. Martins, A Power-Efficient 1.056 GS/s Resolution-Switchable 5-bit/6-bit Flash ADC for UWB Applications

in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS)

pp. 4305-4308 May-2006
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