A A A

Research Group

Home/Research Group
Category: Research Group Total: 1207
Mo Huang, Yan Lu, Seng-Pan U, R. P. Martins, A Reconfigurable Bidirectional Wireless Power Transceiver with Maximum Current Charging Mode and 58.6% Battery-to-Battery Efficiency

IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers (ISSCC)

 pp.376-378 Feb-2017
Mo Huang, Yan Lu, Seng-Pan U, R. P. Martins, An Output-Capacitor-Free Analog-Assisted Digital Low-Dropout Regulator with Tri-loop Control

IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers (ISSCC)

 Feb-2017
Junmin Jiang, Yan Lu, Wing-Hung Ki, Seng-Pan U, R. P. Martins, A Dual-Symmetrical-Output Switched-Capacitor Converter with Dynamic Power Cells and Minimized Cross Regulation for Application Processors in 28nm CMOS

IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers (ISSCC)

 Feb-2017
Chi Hang Chan, Yan Zhu, Ho Iok Meng, Zhang WaiHong, Seng-Pan U, R. P. Martins, A 5mW 7b 2.4GS/s 1-then-2b/cycle SAR ADC with Background Offset Calibration

IEEE International Solid-State Circuits Conference (ISSCC)

 pp. 282-284 Feb-2017
Wei-Han Yu, Haidong Yi, Pui In Mak, Jun Yin, R. P. Martins, A 0.18V 382µW Bluetooth Low-Energy (BLE) Receiver with 1.33nW Sleep Power for Energy-Harvesting Applications in 28nm CMOS

IEEE International Solid-State Circuits Conference (ISSCC), Digest.

 pp. 414-415, Feb-2017
Dante Gabriel Muratore, Alper Akdikmen, Edoardo Bonizzoni, Franco Maloberti, U-Fat Chio, Sai Weng Sin, R. P. Martins, An 8-bit 0.7-GS/s Single Channel Flash-SAR ADC in 65-nm CMOS Technology

. IEEE European Solid-State Circuits Conference – ESSCIRC 2016

 pp. 421-424 Sep-2016
Jianyu Zhong, Yan Zhu, Chi Hang Chan, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 12b 180MS/s 0.068mm2 Pipelined-SAR ADC with Merged-residue DAC for Noise Reduction

IEEE European Solid-State Circuits Conference – ESSCIRC 2016

 pp. 169-172 Sep-2016
Wei Li, Sai Weng Sin, Seng-Pan U, R. P. Martins, A Mixed-Signal Sigma-Delta Interface circuit for Navigation System Applications

International Symposium on Integrated Circuits

 Dec-2016
Biao Wang, Sai Weng Sin, Seng-Pan U, R. P. Martins, A high resolution multi-bit incremental converter insensitive to DAC mismatch error

Ph.D Research in Micro-electronics & Electronics (PRIME)

 Jun-2016
Chi Hang Chan, Yan Zhu, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 6 b 5 GS/s 4 Interleaved 3 b/Cycle SAR ADC

IEEE Journal of Solid-State Circuits

 vol. 51, Issue 2, pp. 365-377 Feb-2016
Publication
Go to Top