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Achievements

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Category: Achievements Total: 971
Md. Tawfiq Amin, Pui In Mak, R. P. Martins, A 3.6mW 6GHz Current-Reuse VCO-Buffer with Improved Load Drivability in 65nm CMOS

Wiley International Journal of Circuit Theory and Applications

 Jun-2013
Jiangchao Wu, Man-Kay Law, Pui In Mak, R. P. Martins, A 1.83μW, 0.78μVrms Input Referred Noise Neural Recording Front End

IEEE International Symposium on Circuits and Systems (ISCAS)

 pp 405-408 May-2013
Md. Tawfiq Amin, Pui In Mak, R. P. Martins, A 0.5V 10GHz 8-Phase LC-VCO Combining Current-Reuse and Back-Gate-Coupling Techniques Consuming 2mW

IEEE International Symposium on Circuits and Systems (ISCAS)

 pp 2698 - 2701 May-2013
WenLan Wu, Yan Zhu, U-Fat Chio, Li Ding, Chi Hang Chan, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 0.6V 8B 100MS/s SAR ADC with Minimized DAC Capacitance and Switching Energy in 65nm CMOS

IEEE International Symposium on Circuits and Systems (ISCAS)

 pp 2239-2242 May-2013
He Gong Wei, U-Fat Chio, Sai Weng Sin, Seng-Pan U, R. P. Martins, Delay Generator

Granted Number: 8,441,295

Application Number: 13/289,229

US Patent

 May-2013
Wai-Hei Choi, Chi-Seng Lam, Man-Chung Wong, Ying-Duo Han, Analysis of DC-link Voltage Controls in Three-Phase Four-Wire Hybrid Active Power Filters

IEEE Transactions on Power Electronics

 Vol.28, Issue 5, pp 2180-2091 May-2013
Yong Chen, Pui In Mak, Li Zhang, He Qian, Yan Wang, A 0.0012mm2, 8mW, Single-to-Differential Converter with <1.1% Data Cross Error and <3.4ps RMS Jitter up to 14Gb/s Data Rate

IET Electronics Letters

 vol.49, no. 11, p. 692-694 May-2013
Chenyan Cai, JIANG Yang, Sai Weng Sin, Seng-Pan U, R. P. Martins, Excess-Loop-Delay Compensation Technique for CT Delta Sigma Modulator with Hybrid Active-Passive Loop-Filters

Analog Integrated Circuits and Signal Processing, Vol. 76, Issue 1

 May-2013
Yun Du, Tao He, JIANG Yang, Sai Weng Sin, Seng-Pan U, R. P. Martins, A Continuous-Time VCO-Assisted VCO-Based ΣΔ Modulator with 76.6dB SNDR and 10MHz BW

in IEEE International Symposium on Circuits and Systems (ISCAS)

 May-2013
Sai Weng Sin, He Gong Wei, Li Ding, Yan Zhu, Chi Hang Chan, U-Fat Chio, Seng-Pan U, R. P. Martins, Franco Maloberti, A Time-Inteleaved Piplined-SAR Analog to Digital Converter with Low Power Consumption

Granted Number: 8,427,355

Application Number: 13/232,442

US Patent

 Apr-2013
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