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Chao Fan

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Chao Fan
樊超 Chao Fan
PhD
  1. Chao Fan, Wei-Han Yu, Pui In Mak, R. P. Martins, A 40-Gb/s PAM-4 Transmitter Using a 0.16-pJ/bit SST-CML-Hybrid (SCH) Output Driver and a Hybrid-Path 3-Tap FFE Scheme in 28-nm CMOS

    IEEE Transactions on Circuits and systems - I

     vol. 66, No.12, pp. 4850–4861, Dec-2019
  1. Chao Fan, Jun Yin, Chee-Cheow Lim, Pui In Mak, R. P. Martins, A 9mW 54.9-to-63.5GHz Current-Reuse LO Generator with a 186.7dBc/Hz FoM by Unifying a 20GHz 3rd Harmonic-Rich Current-Output VCO, a Harmonic-Current Filter and a 60GHz TIA

    IEEE International Solid-State Circuits Conference (ISSCC)

     pp. 282-284 Feb-2020
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