2024-11-15T18:06:12+08:002024-11-14|News&Events, Events|

The Distinguished Lecture on “Introduction to VLSI Signal Processing” will take place as follows:

Date: 19 November 2024 (Tuesday)

Time: 10:30 a.m. – 12:00 p.m.

Venue: Research Building N21, G013

The speaker is:

Prof. WANG Zhongfeng, Professor, School of Integrated Circuits, Sun Yat-sen University, China

The Lecture is:

Introduction to VLSI Signal Processing

 

Abstract:

In this talk, following a brief introduction about basics of VLSI for Digital Signal Processing (DSP), some classical designs will be presented in detail about VLSI Optimizations for Digital Communications. Thereafter, some recent works on efficient VLSI design for AI Inference and Training will be discussed.

 

Biography:

Prof. WANG Zhongfeng received both BS and MS degrees from Tsinghua University, Beijing, China. He obtained the Ph.D. degree from the University of Minnesota, Minneapolis, in 2000. He is currently a professor and the head of the School of Integrated Circuits at Sun Yat-sen University. Since 2016, he has worked for many years at Nanjing University, China, as a Distinguished Professor. Previously he worked for Broadcom Corporation, California, from 2007 to 2016 as a technical director. Even earlier, he worked for National Semiconductor Corporation and Oregon State University successively. Prof. WANG is a world-recognized expert on Low-Power/High-Speed VLSI Design for Signal Processing Systems. He has deeply involved in more than 10 commercial chip designs with a total revenue of over $1B. He has published over 400 technical papers with 7 best paper awards received from IEEE major conferences and transactions, including the Circuits and Systems Society (CASS) VLSI Transactions Best Paper Award in 2007. He has also held tens of U.S. and China patents. In the past, he has served as Associate Editor for multiple transactions of IEEE. Meanwhile, he has contributed significantly to the industrial standards. So far, his technical proposals have been adopted by more than 20 international networking standards. He is a Fellow of IEEE and Fellow of AAIA. His current research interests are in the area of Optimized VLSI Design for Digital Communications and Deep Learning.

 

For more details, kindly find the event poster, abstract and bio.