2024-04-26T10:38:36+08:002024-04-25|News&Events, Events|

The Distinguished Lecture on “Neuromorphic Computing Architecture and Brain-Inspired Chips” will take place as follows:

Date: 29 April 2024 (Monday)

Time: 16:00 – 17:00

Venue: Research Building N21, G013

The speaker is:

Dr. XU Jiawei, Postdoctoral Researcher, School of Electrical Engineering and Computer
Science, KTH Royal Institute of Technology in Stockholm, Sweden


The Lecture is:

Neuromorphic Computing Architecture and Brain-Inspired Chips



Neuromorphic computing and brain-inspired chips are emerging as a promising path to the next generation of intelligent computing systems, which are built on breakthroughs in deep neural networks and domain-specific architectures, and pushing further toward chips that more closely mimic the form and functions of the human brain. Leveraging the potential of processing, adapting, behaving and learning in real time at low power, brain-inspired chips can offer a promising computing paradigm for embedding artificial intelligence into the ubiquitous electronic platform to realize the vision of the Internet of Things (IoT), from the cloud to the resource-constrained edge. This talk will present an exploration of brain-inspired neural network algorithms, neuromorphic computing architecture, emerging memory techniques, dedicated chip design, and promising applications. This talk will also cover our recent work on the energy and area-efficient neural network accelerator for edge computing, and the large-scale memristor-based neuromorphic chip design for the brain cortex model.



Dr. XU Jiawei received the B.S. degree in electronic engineering and the Ph.D. degree in microelectronics from Fudan University, Shanghai, China, in 2016 and 2022, respectively. She is currently a postdoctoral researcher at the School of Electrical Engineering and Computer Science, KTH Royal Institute of Technology in Stockholm, Sweden. Her research interests include brain-inspired chip design, neuromorphic computing architecture, memristor-based circuits, and neural network accelerators. She has authored and co-authored over 20 publications in international journals and conferences, including IEEE TCAS-I, TCAS-II, TBioCAS, and TII.


For more details, kindly find the event poster, abstract and bio.