Data Conversion and Signal Processing

Home/Research Group/Data Conversion and Signal Processing
Si-Seng Wong, U-Fat Chio, Yan Zhu, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 2.3mW 10-bit 170MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC

IEEE Custom Integrated Circuits Conference – CICC 2012

pp 1-4 Aug-2012
Yan Zhu, Chi Hang Chan, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 34fJ 10b 500 MS/s Partial-Interleaving Pipelined SAR ADC

2012 Symposium on VLSI Circuits Digest of Technical Papers

pp 90-91 Jun-2012
Chi Hang Chan, Yan Zhu, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 3.8mW 8b 1GS/s 2b/cycle Interleaving SAR ADC with Compact DAC Structure

2012 Symposium on VLSI Circuits Digest of Technical Papers

pp 86-87 Jun-2012
Yan Zhu, Chi Hang Chan, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 34fJ 10b 500 MS/s Partial-Interleaving Pipelined SAR ADC

2012 Symposium on VLSI Circuits Digest of Technical Papers

pp 90-91 Jun-2012
Chi Hang Chan, Yan Zhu, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 3.8mW 8b 1GS/s 2b/cycle Interleaving SAR ADC with Compact DAC Structure

2012 Symposium on VLSI Circuits Digest of Technical Papers

pp 86-87 Jun-2012
Chi Hang Chan, Yan Zhu, Sai Weng Sin, Seng-Pan U, R. P. Martins, Franco Maloberti, Travel Grant Award (A 3.8mW 8b 1GS/s 2b/cycle Interleaving SAR ADC with Compact DAC Structure)

2012 IEEE Symposium on VLSI Circuits – VLSI 2012

Jun-2012
Guohe Yin, 2012 Best Master Thesis Award in Tsinghua University

Tsinghua University

Jun-2012
Tao He, Yang Jiang, Yun Du, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 10MHz BW 78dB DR CT ΣΔ Modulator with Novel Switched High Linearity VCO-Based Quantizer

IEEE Int. Symposium on Circuits and Systems (ISCAS)

pp 65-69 May-2012
Seng-Pan U, Sai Weng Sin, Yan Zhu, U-Fat Chio, He Gong Wei, R. P. Martins, Design Techniques for Nanometer Wideband Power-Efficient CMOS ADCs

Proc. of IEEE International Symposium on Radio-Frequency Integration Technology – RFIT’2011

pp. 173-176 Nov-2011
Arshad Hussain, Sai Weng Sin, Seng-Pan U, R. P. Martins, Hybrid Loopfilter Sigma-Delta Modulator With NTF Zero Compensation

International SoC Design Conference – ISOCC

pp. 76-79 Nov-2011
Go to Top