A A A

A 0.0056mm2all-digital MDLL using edge re-extraction, dual-ring VCOs and a 0.3mW block-sharing frequency tracking loop achieving 292fsrmsJitter and −249dB FOM

Home/A 0.0056mm2all-digital MDLL using edge re-extraction, dual-ring VCOs and a 0.3mW block-sharing frequency tracking loop achieving 292fsrmsJitter and −249dB FOM
2019-08-02T00:00:00+08:002019-08-02|Uncategorized|
2018-02-01T00:00:00+08:002018-02-01|Achievements, Research Group, Wireless IC, Type, Conference papers and presentations|
Go to Top