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A 1.2-V 10-bit 60-360MS/s Time-Interleaved Pipelined ADC in 0.18um CMOS with Minimized Supply Headroom

Home/A 1.2-V 10-bit 60-360MS/s Time-Interleaved Pipelined ADC in 0.18um CMOS with Minimized Supply Headroom
2010-01-01T00:00:00+08:002010-01-01|Achievements, Research Group, Data Conversion and Signal Processing, Type, Journals and magazines|
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