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A 0.6V 8B 100MS/s SAR ADC with Minimized DAC Capacitance and Switching Energy in 65nm CMOS

Home/A 0.6V 8B 100MS/s SAR ADC with Minimized DAC Capacitance and Switching Energy in 65nm CMOS
2013-05-01T00:00:00+08:002013-05-01|Achievements, Research Group, Data Conversion and Signal Processing, Type, Conference papers and presentations|
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