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Wei Han YU

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Wei Han YU
于維翰 Wei Han YU
  1. Zhongyu Zhao, Rujian Cao, Ka-Fai Un, Wei-Han Yu, Pui-In Mak and Rui P. Martins, An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications

    IEEE Transactions on Circuits and Systems II: Express Briefs

     vol. 70, no. 1, pp. 281-285 Jan-2023
  2. Rui P. Martins; Pui-In Mak; Sai-Weng Sin; Man-Kay Law; Yan Zhu; Yan Lu; Jun Yin; Chi-Hang Chan; Yong Chen; Ka-Fai Un; Mo Huang; Minglei Zhang; Yang Jiang; Wei-Han Yu, Revisiting the Frontiers of Analog and Mixed-Signal Integrated Circuits Architectures and Techniques towards the future Internet of Everything (IoE) Applications

    Foundations and Trends in Integrated Circuits and Systems

     Volume 1, Issue 2-3 Nov-2021
  1. Zhizhan Yang, Jun Yin, Haochen Zhang, Wei-han Yu, Pui-In Mak and Rui P. Martins, An ULP Long-Range Active-RF Tag with Automatic Antenna-Interface Calibration Achieving 20.5% TX Efficiency at -22dBm EIRP, and -60.4dBm Sensitivity at 17.8nW RX Power

    2023 IEEE International Solid-State Circuits Conference (ISSCC)

     Feb-2023
  2. Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Pui-In Mak and Rui P. Martins, A 47nW Mixed-Signal Voice Activity Detector (VAD) Featuring a Non-Volatile Capacitor-ROM, a Short-Time CNN Feature Extractor and an RNN Classifier

    2023 IEEE International Solid-State Circuits Conference (ISSCC)

     Feb-2023
  3. Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui P. Martins, A 108nW 0.8mm2 Analog Voice Activity Detector (VAD) Featuring a Time-Domain CNN as a Programmable Feature Extractor and a Sparsity-Aware Computational Scheme in 28nm CMOS

    IEEE International Solid-State Circuits Conference (ISSCC)

     Feb-2022
People
Wei-Han YU
于維翰 Wei-Han YU
Year of Graduation: Sep 2017
Ph.D. Dissertation: Power-efficient and widebank WLAN transmitter techniques in nanoscale CMOS
Current Appointment: UM Macao Fellow in the State Key Lab of Analog and Mixed-Signal VLSI, UM, Macao
  1. Zhongyu Zhao, Rujian Cao, Ka-Fai Un, Wei-Han Yu, Pui-In Mak and Rui P. Martins, An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications

    IEEE Transactions on Circuits and Systems II: Express Briefs

     vol. 70, no. 1, pp. 281-285 Jan-2023
  2. Rui P. Martins; Pui-In Mak; Sai-Weng Sin; Man-Kay Law; Yan Zhu; Yan Lu; Jun Yin; Chi-Hang Chan; Yong Chen; Ka-Fai Un; Mo Huang; Minglei Zhang; Yang Jiang; Wei-Han Yu, Revisiting the Frontiers of Analog and Mixed-Signal Integrated Circuits Architectures and Techniques towards the future Internet of Everything (IoE) Applications

    Foundations and Trends in Integrated Circuits and Systems

     Volume 1, Issue 2-3 Nov-2021
  1. Zhizhan Yang, Jun Yin, Haochen Zhang, Wei-han Yu, Pui-In Mak and Rui P. Martins, An ULP Long-Range Active-RF Tag with Automatic Antenna-Interface Calibration Achieving 20.5% TX Efficiency at -22dBm EIRP, and -60.4dBm Sensitivity at 17.8nW RX Power

    2023 IEEE International Solid-State Circuits Conference (ISSCC)

     Feb-2023
  2. Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Pui-In Mak and Rui P. Martins, A 47nW Mixed-Signal Voice Activity Detector (VAD) Featuring a Non-Volatile Capacitor-ROM, a Short-Time CNN Feature Extractor and an RNN Classifier

    2023 IEEE International Solid-State Circuits Conference (ISSCC)

     Feb-2023
  3. Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui P. Martins, A 108nW 0.8mm2 Analog Voice Activity Detector (VAD) Featuring a Time-Domain CNN as a Programmable Feature Extractor and a Sparsity-Aware Computational Scheme in 28nm CMOS

    IEEE International Solid-State Circuits Conference (ISSCC)

     Feb-2022
People
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