State key Laboratory of Analog and Mixed-Signal VLSI (AMSV) is pleased to announce that 4 papers and 2 Student Research are accepted by ISSCC 2015. This is a bumper harvest for AMSV.
The IEEE Solid-State Circuits Society is the world’s most authoritative organization in the field of IC (integrated circuits) design, and their IEEE International Solid-State Circuits Conference (ISSCC) is considered the “Chip Olympics” of IC industries.
PhD students Chi-Hang Chan and Zhicheng Lin will present their papers, entitled “A 5.5mW 6b 5GS/s 4-times Interleaved 3b/cycle SAR ADC in 65nm CMOS” and “A 0.028mm2 11mW Single-Mixing Blocker-Tolerant Receiver with Double-RF N-Path Filtering, S11 Centering, +13dBm OB-IIP3 and 1.5-to-2.9dB NF”. Both PhD Students will receive the Pre-Doctoral Achievement Award in the conference too. Our Faculty Staff, Dr. Yan Lu, has two accepted papers, ” A 123-Phase DC-DC Converter-Ring with Fast-DVS for Microprocessors” and "A 2-/3-Phase Fully-Integrated Switched-Capacitor DC-DC Converter in Bulk-CMOS for Energy-Efficient Digital Circuits With 14% Efficiency Improvement” in ISSCC 2015.
PhD Students Ka-Meng Lei and Jianyu Zhong will present their poster at Student Research Preview, entitled “A Multi-Step Multi-Sample µNMR Relaxometer Using Inside-Magnet Digital Microfluidics and a Butterfly-Coil-Input CMOS Transceiver” and “A 12b 180MS/S 0.068mm2 Full-Calibration-Integrated Pipelined-SAR ADC” respectively.
As per ISSCC’s requirement and for preparation of the presenters, we have arranged a rehearsal session before attending the ISSCC 2015 on February 2015, in San Francisco.
The event was held on 17th February 2015 (Tuesday).
ISSCC 2015 Rehearsal Session
Time: 16:00 – 18:00
Venue: E11-1012
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16:00 |
A 5.5mW 6b 5GS/s 4-times Interleaved 3b/cycle SAR ADC in 65nm CMOS Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Martins
Presented by Chi-Hang Chan |
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16:30 |
A Multi-Step Multi-Sample µNMR Relaxometer Using Inside-Magnet Digital Microfluidics and a Butterfly-Coil-Input CMOS Transceiver Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Martins
Presented by Ka-Meng Lei |
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16:40 |
A 12b 180MS/S 0.068mm2 Full-Calibration-Integrated Pipelined-SAR ADC Jianyu Zhong, Yan Zhu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Martins
Presented by Jianyu Zhong |
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16:50 |
Break |
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17:00 |
A 123-Phase DC-DC Converter-Ring with Fast-DVS for Microprocessors Yan Lu, Junmin Jiang, Wing-Hung Ki, C. Patrick Yue, Sai-Weng Sin, Seng-Pan U, Rui Martins
Presented by Yan Lu |
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17:20 |
A 0.028mm2 11mW Single-Mixing Blocker-Tolerant Receiver with Double-RF N-Path Filtering, S11 Centering, +13dBm OB-IIP3 and 1.5-to-2.9dB NF Zhicheng Lin, Pui-In Mak, Rui Martins
Presented by Pui-In Mak |