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Denis Guangyin Chen, Man-Kay Law, Yong Lian, A. Bermak, Low-power CMOS Laser Doppler Imaging using Non-CDS Pixel Readout and 13.6-bit SAR ADC

IEEE Trans. on Biomedical Circuits and Systems

 vol. 10, Issue. 1, pp. 186-199 Feb-2016
Jun Yin, Pui In Mak, Franco Maloberti, R. P. Martins, A 0.003mm2 1.7-to-3.5GHz Dual-Mode Time-Interleaved Ring-VCO Achieving 90-to-150kHz 1/f3 Phase Noise Corner

IEEE International Solid-State Circuits Conference (ISSCC), Digest

 pp. 48-49 Feb-2016
Keng-Weng Lao, Man-Chung Wong, Ning-Yi Dai, Chi-Kong Wong, Chi-Seng Lam, Analysis of dc link operation voltage of a hybrid railway power quality conditioner and its pq compensation capability in high speed co-phase traction power supply

IEEE Transactions on Power Electronics

 vol. 31, no. 2, pp. 1643 – 1656 Feb-2016
Gengzhen Qi, Pui In Mak, R. P. Martins, A 0.038mm2 SAW-less Multi-Band Transceiver Using an N-Path SC Gain Loop

IEEE International Solid-State Circuits Conference (ISSCC), Digest.

 pp. 452-453 Feb-2016
Yan Lu, Wing-Hung Ki, C. Patrick Yue, An NMOS-LDO Regulated Switched-Capacitor DC-DC Converter with Fast Response Adaptive Phase Digital Control

IEEE Transactions on Power Electronics

 vol. 31, no. 2, pp. 1294-1303 Feb-2016
Chio-In Ieong, Mingzhong Li, Man-Kay Law, Pui In Mak, Mang I Vai, R. P. Martins, “Student Research Preview,”

IEEE International Solid-State Circuits Conference (ISSCC)

 Session 2, Paper No. 3 Feb-2016
Chio-In Ieong, Pui In Mak, Mang I Vai, R. P. Martins, Sub-µW QRS Detection Processor Using Quadratic Spline Wavelet Transform and Maxima Modulus Pair Recognition for Power-Efficient Wireless Arrhythmia Monitoring

Asia and South Pacific Design Automation Conference (ASP-DAC)

 Jan-2016
Chak Fong Cheang, Ka-Fai Un, Pui In Mak, R. P. Martins, Time-Domain I/Q-LOFT Compensator Using a Simple Envelope Detector for a Sub-GHz IEEE 802.11af WLAN Transmitte

Asia and South Pacific Design Automation Conference (ASP-DAC)

 Jan-2016
Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui In Mak, Mang I Vai, Sio Hang Pun, R. P. Martins, Sub-threshold VLSI Logic Family Exploiting Unbalanced Pull-up/down Network, Logical Effort and Inverse-Narrow-Width Techniques

Asia and South Pacific Design Automation Conference (ASP-DAC)

 Jan-2016
Jianwei Lui, Yan Zhu, Chi Hang Chan, Sai Weng Sin, Seng-Pan U, R. P. Martins, Uniform Quantization Theory-Based Linearity Calibration for Split Capacitive DAC in an SAR ADC

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

 Issue 24, Issue 7, pp. 2603-2607 Jan-2016
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