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Data Conversion and Signal Processing

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Category: Data Conversion and Signal Processing Total: 481
Ka Hou Ao Ieong, Seng-Pan U, R. P. Martins, A 1-V 2.5-mW Transient-Improved Current-Steering DAC using Charge-Removal-Replacement Technique

IEEE Asia Pacific Conference on Circuit and Systems (APCCAS)

 pp. 183-186 Dec-2006
Chon-In Lao, Seng-Pan U, R. P. Martins, An Expandable and Extendable High-Order Semi-MASH Sigma Delta Modulator

Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2006

 pp. 68-73 Jul-2006
Ka Hou Ao Ieong, Seng-Pan U, R. P. Martins, Design of a 1-V 10-bit 120MS/s Current-Steering DAC with Transient-Improved Technique

Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2006

 pp. 137-140 Jul-2006
Weng Ieng Mok, Pui In Mak, Seng-Pan U, R. P. Martins, A Novel Architecture of Comparator-Mismatch-Free Multi-bit Pipeline ADC

Proceedings of the Regional Inter-University Postgraduate Electrical and Electronic Engineering Conference (RIUPEEEC), Session of Circuit and System

 pp. 129-132 Jul-2006
Jun-Xia Ma, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 1.8V 1.056GS/s 6-b Flash-Interpolation ADC for MB-OFDM UWB Applications

Proceedings of RIUPEEEC (Macao, China)

 pp. 105-108 Jul-2006
Jun-Xia Ma, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 1.8V 1.056GS/s 6-b Flash-Interpolation ADC for MB-OFDM UWB Applications

Proceedings of RIUPEEEC (Macao, China)

 pp. 105-108 Jul-2006
Ka Hou Ao Ieong, Seng-Pan U, R. P. Martins, Design of a 1-V 10-bit 120MS/s Current-Steering DAC with Transient-Improved Technique

Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2006

 pp. 137-140 Jul-2006
Weng Ieng Mok, Pui In Mak, Seng-Pan U, R. P. Martins, A Novel Architecture of Comparator-Mismatch-Free Multi-bit Pipeline ADC

Proceedings of the Regional Inter-University Postgraduate Electrical and Electronic Engineering Conference (RIUPEEEC), Session of Circuit and System

 pp. 129-132 Jul-2006
Chon-In Lao, Seng-Pan U, R. P. Martins, An Expandable and Extendable High-Order Semi-MASH Sigma Delta Modulator

Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2006

 pp. 68-73 Jul-2006
Sai Weng Sin, Seng-Pan U, R. P. Martins, Novel Timing-Skew-Insensitive, Multi-phase Clock Generation Scheme for Parallel DAC and N-Path Filter

Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2006

 pp. 133-136 Jul-2006
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