Data Conversion and Signal Processing

A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS

2011 Feb 25 | Fri

...

Silk-Road Award (A 0.024mm2 8-bit 400 MS/s SAR ADC with 2-bit per Cycle and Resistive DAC in 65 nm CMOS)

2011 Feb 01 | Tue

...

A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS

2011 Feb 01 | Tue

...

An Ultra Low Power 9-bit 1-MS/s Pipelined SAR ADC for Bio-medical Applications

2010 Dec 31 | Fri

...

An Efficient DAC and Interstage Gain Error Calibration Technique For Multi-Bit Pipelined ADCs

2010 Dec 28 | Tue

...

A Reduced Jitter-Sensitivity Clock Generation Technique for Continuous-Time ΣΔ Modulators

2010 Dec 28 | Tue

...

Honorary Title of Value of 2010 ( An annual government decoration for Macau citizen who has great contribution to Macau SAR reputation, development and society advancement)

2010 Dec 09 | Thu

...

Honorary Title of Value of 2010 ( An annual government decoration for Macau citizen who has great contribution to Macau SAR reputation, development and society advancement)

2010 Dec 01 | Wed

...

An Efficient DAC and Interstage Gain Error Calibration Technique For Multi-Bit Pipelined ADCs

2010 Dec 01 | Wed

...

An Ultra Low Power 9-bit 1-MS/s Pipelined SAR ADC for Bio-medical Applications

2010 Dec 01 | Wed

...