Data Conversion and Signal Processing

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He Gong Wei, Chi Hang Chan, U-Fat Chio, Sai Weng Sin, Seng-Pan U, R. P. Martins, Franco Maloberti, A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS

IEEE International Solid-State Circuit Conference (ISSCC),

pp. 188-189 Feb-2011
Guohe Yin, U-Fat Chio, He Gong Wei, Sai Weng Sin, Seng-Pan U, R. P. Martins, Zhihua Wang, An Ultra Low Power 9-bit 1-MS/s Pipelined SAR ADC for Bio-medical Applications

IEEE International Conference on Electronics, Circuits and Systems (ICECS)

pp. 878-881 Dec-2010
Li Ding, Sai Weng Sin, Seng-Pan U, R. P. Martins, An Efficient DAC and Interstage Gain Error Calibration Technique For Multi-Bit Pipelined ADCs

IEEE Asia Pacific Conference on Circuit and Systems (APCCAS)

pp. 208-211 Dec-2010
Yang Jiang, Kim Fai Wong, ChenYan Cai, Sai Weng Sin, Seng-Pan U, R. P. Martins, A Reduced Jitter-Sensitivity Clock Generation Technique for Continuous-Time ΣΔ Modulators

IEEE Asia Pacific Conference on Circuit and Systems (APCCAS)

pp. 1011-1014 Dec-2010
Seng-Pan U, Honorary Title of Value of 2010 ( An annual government decoration for Macau citizen who has great contribution to Macau SAR reputation, development and society advancement)

Macau SAR Government

Dec-2010
Seng-Pan U, Honorary Title of Value of 2010 ( An annual government decoration for Macau citizen who has great contribution to Macau SAR reputation, development and society advancement)

Macau SAR Government

Dec-2010
Li Ding, Sai Weng Sin, Seng-Pan U, R. P. Martins, An Efficient DAC and Interstage Gain Error Calibration Technique For Multi-Bit Pipelined ADCs

IEEE Asia Pacific Conference on Circuit and Systems (APCCAS)

pp. 208-211 Dec-2010
Guohe Yin, U-Fat Chio, He Gong Wei, Sai Weng Sin, Seng-Pan U, R. P. Martins, Zhihua Wang, An Ultra Low Power 9-bit 1-MS/s Pipelined SAR ADC for Bio-medical Applications

IEEE International Conference on Electronics, Circuits and Systems (ICECS)

pp. 878-881 Dec-2010
He Gong Wei, U-Fat Chio, Sai Weng Sin, Seng-Pan U, R. P. Martins, A Process-insensitive Current-Controlled Delay Generator with Threshold Voltage Compensation

IEEE Asian Solid-State Circuits Conference – ASSCC 2010

pp. 1-4 Nov-2010
He Gong Wei, U-Fat Chio, Sai Weng Sin, Seng-Pan U, R. P. Martins, A Process-insensitive Current-Controlled Delay Generator with Threshold Voltage Compensation

IEEE Asian Solid-State Circuits Conference – ASSCC 2010

pp. 1-4 Nov-2010
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