Data Conversion and Signal Processing

A 2.3 mW 10-bit 170 MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC

2013 Aug 31 | Sat

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A Background Gain-Calibration Technique for Low Voltage Pipelined ADCs Based on Nonlinear Interpolation

2013 Aug 03 | Sat

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A Background Gain-Calibration Technique for Low Voltage Pipelined ADCs Based on Nonlinear Interpolation

2013 Aug 01 | Thu

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A 2.3 mW 10-bit 170 MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC

2013 Aug 01 | Thu

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Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active-passive loop-filters

2013 Jul 31 | Wed

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Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active-passive loop-filters

2013 Jul 01 | Mon

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Scientific Chinese of the Year 2012 (Information Technology and Electronics category)

2013 Jun 01 | Sat

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Monotonic Multi-Switching Method for Ultra-Low-Voltage Energy Efficient SAR ADCs

2013 Jun 01 | Sat

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Cascade Analog to Digital Converting System

2013 Jun 01 | Sat

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A Continuous-Time VCO-Assisted VCO-Based Sigma Delta Modulator with 76.6dB SNDR and 10MHz BW

2013 May 02 | Thu

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