無線IC

Chenyan Cai, JIANG Yang, Sai Weng Sin, Seng-Pan U, R. P. Martins, An ELD Tracking Compensation Technique for Active-RC CT ΣΔ Modulators

in IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)

Aug-2012

Pui In Mak, Chon-Teng Ma, R. P. Martins, A Frequency-Translation Technique for Low-Noise Ultra-Low-Cutoff Lowpass Filtering

Analog Integrated Circuits and Signal Processing, Springer

Vol.72, Issue1, pp 265-269 Jul-2012

Pui In Mak, Seng-Pan U, R. P. Martins, Switched Current-Resistor Programmable Gain Array for Low-Voltage Wireless LAN System and Method Using the Same

Granted Number: 8,229,382

Application Number:12/355,658,

US Patent

Jul-2012

Yong Chen, Pui In Mak, L. Zhang, Y. Wang, A 0.07mm2, 2mW, 75MHz-IF, 4th-Order BPF Using a Source-Follower-Based Resonator in 90nm CMOS

IET Electronics Letters

Vol.48, No.10 May-2012

Miguel A. Martins, Pui In Mak, R. P. Martins, A 0.02-to-6GHz SDR Balun-LNA Using a Triple-Stage Inverter-Based Amplifier

IEEE International Symposium on Circuits and Systems (ISCAS)

pp 472-475 May-2012

Zushu Yan, Pui In Mak, Man-Kay Law, R. P. Martins, Ultra-area-efficient three-stage amplifier using current buffer Miller compensation and parallel compensation

Electronics Letters

Vol.48, Issue 11, pp 624-626 May-2012

Pui In Mak, Creating Multi-Stage Amplifiers with a Wide Range of Output-Current Drivability and Capacitive-Load Drivability is still very Challenging – Interview

IET Electronics Letters

Vol.48 , Issue 11, pp 602 May-2012

Tao He, JIANG Yang, Yun Du, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 10MHz BW 78dB DR CT ΣΔ Modulator with Novel Switched High Linearity VCO-Based Quantizer

in IEEE International Symposium on Circuits and Systems (ISCAS)

May-2012

Zushu Yan, Pui In Mak, R. P. Martins, Double Recycling Technique for Folded-Cascode OTA

Analog Integrated Circuits and Signal Processing, Springer

Vol. 71, Issue 1, pp 137-141 Apr-2012