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數據轉換和信號處理

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分類: 數據轉換和信號處理 總計: 250
Lei Qiu, Kai Tang, Yuanjin Zheng, Liter Siek, Yan Zhu, Seng-Pan U, A 16-mW 1-GS/s With 49.6-dB SNDR TI-SAR ADC for Software-Defined Radio in 65-nm CMOS

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

 vol. 26, no. 3, pp. 572-583 Dec-2017
U-Fat Chio, Sai Weng Sin, Seng-Pan U, Franco Maloberti, R. P. Martins, A 5-bit 2 GS/s binary-search ADC with charge-steering comparators

IEEE Asian Solid-State Circuits Conference (A-SSCC)

 pp221-224 Nov-2017
Wei Wang, Yan Zhu, Chi Hang Chan, Seng-Pan U, R. P. Martins, A 5.35 mW 10 MHz Bandwidth CT Third-Order ∆∑ Modulator with Single Opamp Achieving 79.6/84.5 dB SNDR/DR in 65 nm CMOS

IEEE Asian Solid-State Circuits Conference (A-SSCC)

 (highlighted paper and suggested to JSSC special issue), pp.285-288 Nov-2017
Liang Qi, Sai Weng Sin, Seng-Pan U, Franco Maloberti, R. P. Martins, A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH ΔΣ Modulator With Multirate Opamp Sharing

IEEE Transactions on Circuits and Systems I - Regular Papers

 Vol. 64 , Issue: 10, pp 2641 - 2654 Oct-2017
Chi Hang Chan, Yan Zhu, Cheng Li, Zhang WaiHong, Ho Iok Meng, Lai Wei, Seng-Pan U, R. P. Martins, 60-dB SNDR 100-MS/s SAR ADCs With Threshold Reconfigurable Reference Error Calibration

IEEE Journal of Solid-State Circuits

 vol. 52, no. 10, pp. 2576-2588 Oct-2017
Wang GuanCheng, Yan Zhu, Chi Hang Chan, Seng-Pan U, R. P. Martins, A missing-code-detection gain error calibration achieving 63dB SNR for an 11-bit ADC

ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference

 Leuven, pp. 239-242. Sep-2017
Chi Hang Chan, Yan Zhu, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 7.8mW 5b 5GS/s Dual-Edges-Triggered Time-Based Flash ADC

in IEEE Transactions on Circuits and Systems I: Regular paper

 Vol.64, Issue 8, pp.1966-1976 Aug-2017
Jianyu Zhong, Yan Zhu, Chi Hang Chan, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 12b 180MS/s 0.068mm2 with Full-Calibration-Integrated Pipelined-SAR ADC

IEEE Transactions on Circuits and Systems I: Regular paper

 Vol.64, No 7, pp.1684-1695 Jul-2017
Jiang DongYang, Sai Weng Sin, Seng-Pan U, R. P. Martins, Franco Maloberti, Reconfigurable mismatch-free time-interleaved bandpass sigma–delta modulator for wireless communications

Electronics Letters

 Vol. 53 , Issue: 7, pp 506 - 508 Mar-2017
Dezhi Xing, Yan Zhu, Chi Hang Chan, Sai Weng Sin, Fan Ye, Junyan Ren, Seng-Pan U, R. P. Martins, Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial Vcm-Based Switching

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

 Vol.25, Issue 3, pp.1168-1172 Mar-2017
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