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數據轉換和信號處理

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分類: 數據轉換和信號處理 總計: 250
Kai-Yiu Che, Hon-Weng Chong, Seng-Pan U, R. P. Martins, A 1-V 5.12-MHz Sampling-Rate 13-bit CMOS Sigma-Delta Modulator Using Reset-Opamp Technique for Portable Aduio Data Acquistion System

in Proc. of IEEJ (7th) International Analog VLSI Workshop (AVLSIWS)

 pp. 186-191 Oct-2004
Hon-Weng Chong, Kai-Yiu Che, Seng-Pan U, R. P. Martins, A 1-V 2.56-MHz Clock-Rate CMOS Multi-bit Sigma-Delta Modulator with Reset-Opamp Technique and Pseudo Data-Weighted-Averaging for Portable Audio Data Acquisition System

in Proc. of IEEJ (7th) International Analog VLSI Workshop (AVLSIWS)

 pp. 180-185 Oct-2004
Sai Weng Sin, Seng-Pan U, R. P. Martins, Novel Low Jitter Multi-Phase Clock Generation Scheme for Parallel Analog-to-Digital Conversion Systems

Proc. IEEE/IEEJapan International Analog VLSI Workshop – AVLSIWS 2004

 pp. 172-175 Oct-2004
Seng-Pan U, Sai Weng Sin, R. P. Martins, Exact Spectra Analysis of Sampled Signals with Jitter-Induced Nonuniformly Holding Effects

IEEE Transactions on Instrumentation and Measurement

 vol. 53, Issue 4, pp. 1279-1299 Aug-2004
Ngai Kong, Seng-Pan U, R. P. Martins, A Novel Current-Mode Reconfigurable Membership Function Circuit for Mixed-Signal Fuzzy Hardware

Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2006

 pp. 101-104 Jul-2004
Kin-Sang Chio, Seng-Pan U, R. P. Martins, A Novel Low-Voltage 2nd-Order Sigma-Delta Modulator with Double-Sampling for GSM/DECT/WCDMA

in Proc. of International Conference on Communications, Circuits and Systems (ICCCAS)

 vol. 2, pp. 1146-1150 Jun-2004
Pui In Mak, Seng-Pan U, R. P. Martins, A Low-IF/Zero-IF Reconfigurable Receiver with Two-Step Channel Selection Technique for Multistandard Applications

", in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS)

 vol. 4, pp. 417-420 May-2004
Sai Weng Sin, Seng-Pan U, R. P. Martins, A Generalized Timing-Skew-Free, Multi-Phase Clock Generation Platform for Parallel Sampled-Data Systems

in Proc. of 2004 IEEE International Symposium on Circuits and Systems (ISCAS)

 vol. 1, pp. I-369 – I-372 May-2004
Chon-In Lao, Seng-Pan U, R. P. Martins, Bandpass Sigma-Delta Modulator SIMULINK® Non-Idealities Model with Behavior Simulation

Proc. International Conference on ASIC – ASICON 2003

 pp. 203-206 Oct-2003
Chon-In Lao, Ho-Ieng Ieong, Kuai-Fok Au, Kuok Hang Mok, Seng-Pan U, R. P. Martins, A 10.7-MHz Bandpass Sigma-Delta Modulator using Double-Delay Single-Opamp SC Resonator with Double-Sampling

in Proc. of IEEE International Symposium on Circuits and Systems 2003 (ISCAS)

 vol. 1, pp. 1061-1064, May-2003
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