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數據轉換和信號處理

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分類: 數據轉換和信號處理 總計: 252
Yan Zhu, Chi Hang Chan, Sai Weng Sin, Seng-Pan U, R. P. Martins, Franco Maloberti, A 35 fJ 10b 160 MS/s Pipelined-SAR ADC with Decoupled Flip-Around MDAC and Self-Embedded Offset Cancellation

Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC, "Asia Chip Olympic")

 pp. 61-64 Best Student Design Contest Award Nov-2011
Si-Seng Wong, U-Fat Chio, He Gong Wei, Chi Hang Chan, Hou-Lon Choi, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 4.8-bit ENOB 5-bit 500MS/s binary-search ADC with minimized number of comparators

Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC, "Asia Chip Olympic")

 pp. 73-76 Nov-2011
Yuan Fei, Sai Weng Sin, Seng-Pan U, R. P. Martins, Bronze Leaf Certificate (A nonlinearity digital background calibration algorithm for 2.5bit/stage pipelined ADCs with opamp sharing architecture)

IEEE Asia Pacific Conference on Postgraduate Research in Micro-electronics & Electronics (PrimeAsia)

 Oct-2011
Chi Hang Chan, Chipidea Microelectronics Prize (A Study on Comparator and Offset Calibration Techniques in High Speed Nyquist ADCs)

Chipidea Microelectronics

 Oct-2011
Arshad Hussain, Sai Weng Sin, Seng-Pan U, R. P. Martins, NTF Zero Compensation Technique For Passive Sigma-Delta Modulator

IEEE Asia Pacific Conference on Postgraduate Research in Micro-electronics & Electronics (PrimeAsia)

 pp. 82-85 Oct-2011
Yuan Fei, Sai Weng Sin, Seng-Pan U, R. P. Martins, A nonlinearity digital background calibration algorithm for 2.5bit/stage pipelined ADCs with opamp sharing architecture

Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimaAsia)

 pp. 1-4 Oct-2011
Rui Wang, U-Fat Chio, Chi Hang Chan, Li Ding, Sai Weng Sin, Seng-Pan U, Zhihua Wang, R. P. Martins, A time-efficient dither-injection scheme for pipelined SAR ADC

IEEE Asia Pacific Conference on Postgraduate Research in Micro-electronics & Electronics (PrimeAsia)

 pp. 9-12 Oct-2011
U-Fat Chio, Chi Hang Chan, Hou-Lon Choi, Sai Weng Sin, Seng-Pan U, R. P. Martins, A 7-bit 300-MS/s Subranging ADC with Embedded Threshold & Gain-Loss Calibration

", IEEE European Solid-State Circuits Conference – ESSCIRC 2011

 pp. 363-366 Sep-2011
Jianyu Zhong, Yan Zhu, Sai Weng Sin, Seng-Pan U, R. P. Martins, Multi-Merged-Switched Redundant Capacitive DACs for 2b/cycle SAR ADC

IEEE Midwest Symposium on Circuits and Systems – MWSCAS

 pp. 1-4 Aug-2011
Tao He, Yun Du, Yang Jiang, Sai Weng Sin, Seng-Pan U, R. P. Martins, A Dual-VCO-Based Quantizer with Highly Improved Linearity and Enlarged Dynamic Range

IEEE International Midwest Symposium on Circuits and Systems – MWSCAS

 pp. 1-4 Aug-2011
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