發表 著作

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ChenYan Cai, Yang Jiang, Sai Weng Sin, Seng-Pan U, R. P. Martins, A Passive Excess-Loop-Delay Compensation Technique for Gm-C Based Continuous-Time Sigma-Delta Modulators

IEEE Midwest Symposium on Circuits and Systems – MWSCAS

pp. 1-4 Aug-2011
Tao He, Yun Du, JIANG Yang, Sai Weng Sin, Seng-Pan U, R. P. Martins, A Dual-VCO-Based Quantizer with Highly Improved Linearity and Enlarged Dynamic Range

in IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)

Aug-2011
Jianyu Zhong, Yan Zhu, Sai Weng Sin, Seng-Pan U, R. P. Martins, Multi-Merged-Switched Redundant Capacitive DACs for 2b/cycle SAR ADC

IEEE Midwest Symposium on Circuits and Systems – MWSCAS

pp. 1-4 Aug-2011
JIANG Yang, ChenYan Cai, Sai Weng Sin, Seng-Pan U, R. P. Martins, Clock-Jitter Sensitivity Reduction in CT Sigma-Delta Modulators Using Voltage-Crossing Detection DAC

IEEE Midwest Symposium on Circuits and Systems – MWSCAS

pp. 1-4 Aug-2011
Tao He, Yun Du, Yang Jiang, Sai Weng Sin, Seng-Pan U, R. P. Martins, A Dual-VCO-Based Quantizer with Highly Improved Linearity and Enlarged Dynamic Range

IEEE International Midwest Symposium on Circuits and Systems – MWSCAS

pp. 1-4 Aug-2011
Peng Zhang, Zhijie Chen, He Gong Wei, Sai Weng Sin, Seng-Pan U, Zhihua Wang, R. P. Martins, A Charge Pump Based Timing-Skew Calibration for Time-Interleaved ADC

", IEEE Midwest Symposium on Circuits and Systems – MWSCAS

pp. 1-4 Aug-2011
Zhijie Chen, Peng Zhang, He Gong Wei, Sai Weng Sin, Seng-Pan U, R. P. Martins, Zhihua Wang, Noise Shaping Implementation in Two-Step/SAR ADC Architectures Based on Delayed Quantization Error

IEEE Midwest Symposium on Circuits and Systems – MWSCAS

pp. 1-4 Aug-2011
Chenyan Cai, JIANG Yang, Sai Weng Sin, Seng-Pan U, R. P. Martins, A Passive Excess-Loop-Delay Compensation Technique for Gm-C Based Continuous-Time ΣΔ Modulators

in IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)

Aug-2011
Pui In Mak, Can Artificial Intelligence be Realized and will it Benefit Humanity

IEEE Potentials

Vol. 30, issue 2, pp 6-7 Jul-2011
Bo Sun, Ning-Yi Dai, U-Fat Chio, Man-Chung Wong, Chi-Kong Wong, Sai Weng Sin, Seng-Pan U, R. P. Martins, FPGA-based Decoupled Double Synchronous Reference Frame PLL for Active Power Filters

2011 6th IEEE Conference on Industrial Electronics and Applications (ICIEA)

pp. 2145 – 2150 Jun-2011
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