分類: 調研組
總計:
939
A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery Circuit (BBCDR) in 28-nm CMOS
IEEE Asia Pacific Conference on Circuits and Systems
Nov-2019
Best Paper Award
IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
Nov-2019