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Mingqiang Guo

首页/Mingqiang Guo
Mingqiang Guo
郭铭强 Mingqiang Guo
助理教授
Phone: (+853) 8822-9125
Room Number: N21-3007d

Academic Qualifications

  • Ph.D. in Electrical and Electronics Engineering, Faculty of Science and Technology, University of Macau, China (2020)
  • M.Sc. in Integrated Circuit Engineering, School of Information Science and Technology, Fudan University, Shanghai, China (2014)
  • B.Sc. in Integrated Circuit Design and Integrated Systems, School of Microelectronics, Xidian University, Xi’an, China (2011)

Professional Experience

  • Assistant Professor, State-Key Lab. of Analog and Mixed-Signal VLSI, University of Macau (Apr. 2022 – Present)
  • Postdoctoral Follow, State-Key Lab. of Analog and Mixed-Signal VLSI, University of Macau (July 2020 – Mar. 2022)

Research

Research Interests

  • High-speed data converters
  • Background calibration techniques for ADCs
  • Analog and mixed-signal CMOS integrated circuits

Professional Services

  • Peer Reviewer of
    • IEEE Journal of Solid-State Circuits (JSSC)
    • IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I)
    • IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II)

  1. Hongjiang Chen, Yuhang Peng, Liang Qi, Biao Wang, Sai-Weng Sin, Rui P. Martins and Mingqiang Guo, A 12-Bit 1-Gs/S 5.1-mW Pipelined ADC Using an Open-Loop Floating Inverter Amplifier with Residue-Dependent Integration Time Compensation

    IEEE Journal of Solid-State Circuits

     vol. 58, Early Access Nov-2025
  2. Xinyu Qin, Yichen Jin, Mingqiang Guo, Guoxing Wang, Sai-Weng Sin, Maurits Ortmanns, Yong Lian, Liang Qi, Analysis and Design of a Pipelined MASH Continuous-Time Delta-Sigma Modulator With 15.4 MHz-BW and 82.6 dB-SNDR

    IEEE Transactions on Circuits and Systems I: Regular Papers

     Early Access Aug-2025
  3. Haoyu Gong, Ke Li, Wen-Liang Zeng, Mingqiang Guo, Chi-Seng Lam, Shulin Zhao, Rui P. Martins, Sai-Weng Sin, A 2-Channel Time-Interleaved Noise-Shaping SAR ADC Directly Powered by a DC–DC Converter

    IEEE Transactions on Circuits and Systems I - Regular Papers (TCAS-I)

     (Early Access) May-2025
  4. Yuetao Peng, Xizhu Peng, Hu Wang, Dongbing Fu, Yabo Ni, Can Zhu, Boyuan Zhang, Lei Chen, Zhe Hu, Zhifei Lu, He Tang, Mingqiang Guo, Kolmogorov–Arnold Networks-Based Calibration for Single-Channel ADCs: High-Precision Nonlinear Code Synthesis With Low Power Consumption

    IEEE Transactions on Circuits and Systems I: Regular Papers, Early Access, 2025

     Apr-2025
  5. Ke Li, Liang Qi, Mingqiang Guo, Rui P. Martins and Sai-Weng Sin, Wideband Continuous-Time MASH ADCs: Principles, Challenges, and Prospects

    IEEE Open Journal of the Solid-State Circuits Society

     Feb-2025
  6. R. Zhang, Xueru Cen, Ka-Fai Un, Mingqiang Guo, et al, A 362-TOPS/W Mixed-Signal MAC Macro With Sampling-Weight-Nonlinearity Cancellation and Dynamic-Amplified Accumulation

    IEEE Transactions on Circuits and Systems I: Regular Papers, Early Access, 2025

     Jan-2025
  7. Ke Li, Haoyu Gong, Congzhou Xianyu, Zhensheng Li, Liang Qi, Mingqiang Guo, Rui P. Martins, Sai-Weng Sin, A 160-MHz BW 68-dB SNDR 36.2 mW Continuous-Time Pipelined ΔΣ ADC With DAC Image Prefiltering

    IEEE Journal of Solid-State Circuits

     vol. 60, no. 3, pp. 838-849 Dec-2024
  8. Zhifei Lu, Boyuan Zhang, Yutao Peng, Xizhu Peng, He Tang, Jie Pu, Ling Qin, Mingqiang Guo, A Novel NN-Based Fast-Convergence Background Calibration for Timing Mismatch in TI ADCs

    IEEE Transactions on Circuits and Systems II: Express Briefs

     Oct-2024
  9. Mingqiang Guo, Liang Qi, Weibing Zhao, Gangjun Xiao, Rui P. Martins and Sai -Weng Sin, A 10b 700 MS/s Single-Channel 1b/Cycle SAR ADC Using a Monotonic-Specific Feedback SAR Logic With Power-Delay-Optimized Unbalanced N/P-MOS Sizing

    IEEE Transactions on Circuits and Systems I: Regular Papers

     Aug-2023
  10. Gaofeng Tan, Xinyu Qin, Yan Liu, Mingqiang Guo, et al, A 10MHz-BW 85dB-DR CT 0-4 Mash Delta-Sigma Modulator Achieving +5dBFS MSA

    IEEE Transactions on Circuits and Systems I: Regular Papers

     Aug-2023
  11. Yue Hu, Yuekai Liu, Xinyu Qin, Yan Liu, Mingqiang Guo, et al., A Two-Channel Time-Interleaved Continuous-Time Third-Order CIFF-Based Delta-Sigma Modulator

    IEEE Transactions on Circuits and Systems I: Regular Papers

     Aug-2023
  12. Shunlin Zhao, Mingqiang Guo, et al., A 3.07 mW 30 MHz-BW 73.2 dB-SNDR Time- Interleaved Noise-Shaping SAR ADC With Self-Coupling Second-Order Error-Feedforward

    IEEE Journal of Solid-State Circuits

     May-2023
  13. Danfeng Zhai, Wenning Jiang, Xinru Jia, Jingchao Lan, Mingqiang Guo, et al., High-Speed and Time-Interleaved ADCs Using Additive-Neural-Network-Based Calibration for Nonlinear Amplitude and Phase Distortion

    IEEE Transactions on Circuits and Systems I: Regular Papers

     Aug-2022
  14. Mingqiang Guo, Sai -Weng Sin, Liang Qi, Dengke Xu, Guoxing Wang and Rui P. Martins, Background Timing Mismatch Calibration Techniques in High-Speed Time-Interleaved ADCs: A Tutorial Review

    IEEE Transactions on Circuits and Systems II: Express Briefs

     Mar-2022
  15. Mingqiang Guo, Jiaji Mao, Sai-Weng Sin, Hegong Wei, Rui P. Martins, A 5 GS/s 29 mW Interleaved SAR ADC With 48.5 dB SNDR Using Digital-Mixing Background Timing-Skew Calibration for Direct Sampling Applications

    IEEE Access

     Jul-2020
  16. Mingqiang Guo, Jiaji Mao, Sai Weng Sin, Hegong Wei, R. P. Martins, A 1.6GS/s 12.2mW 7/8-way Split Time-Interleaved SAR ADC achieving 54.2-dB SNDR with Digital Background Timing Mismatch Calibration

    IEEE Journal of Solid-State Circuits

     vol. 55, Issue 3, pp. 693-705 (invited special issue of CICC) Mar-2020
  17. Jiali Ma, Mingqiang Guo, Sai Weng Sin, R. P. Martins, A 14-Bit Split-Pipeline ADC With Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current

    IEEE Transactions on Circuits and Systems II: Express Briefs

     Vol.65, No.10, pp 1380 - 1384 Oct-2018
  1. Zhensheng Li, Biao Wang, Mingqiang Guo, Rui P. Martins and Sai -Weng Sin, A 103.9dB-SFDR 83.8dB-SNDR 3MHz-BW Multi-Bit Quadratic-Exponential Noise-Coupled IDSM with High Tolerance to DAC Non-Linearity

    2026 IEEE International Solid-State Circuits Conference (ISSCC)

     Feb-2026
  2. Baolong Huang, Hongjiang Chen, Jingxiang Wang, Yutao Peng, Zhifei Lu, Xizhu Peng, He Tang, Liang Qi, Yawei Guo, Sai-Weng Sin, Rui P. Martins, and Mingqiang Guo, A 3.4 mW 64.5 dB SNDR 800MS/s Pipelined-SAR/TDC ADC with Parallel Amplification and Quantization

    2025 IEEE Asian Solid-State Circuits Conference (A-SSCC)

     Nov-2025
  3. Haoyu Li, Sai -Weng Sin, Rui P. Martins and Mingqiang Guo, Voltage-Domain vs. Time-Domain: Trade-offs in High-Speed Applications

    2025 IEEE 16th International Conference on ASIC (ASICON)

     Oct-2025
  4. Hongjiang Chen, Yuhang Peng, Liang Qi, Biao Wang, Sai-Weng Sin, Rui P. Martins and Mingqiang Guo, A 12-Bit 1-Gs/S 5.1-mW Pipelined ADC Using an Open-Loop Floating Inverter Amplifier with Residue-Dependent Integration Time Compensation

    2025 IEEE European Solid-State Electronics Research Conference (ESSERC)

     Sep-2025
  5. Haoyu Li, Kaize Zhang, Liang Qi, Sai-Weng Sin, Rui P. Martins and Mingqiang Guo, A PVT-Robust 16GS/s 4×TI Time-Domain ADC with Vernier-Based Multipath Flash TDC Achieving 25.7fJ/c-s FoM in 28nm CMOS

    2025 Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

     Jun-2025
  6. Haoyu Li, Boyang Wang, Hongjiang Chen, Sai-Weng Sin, Yutao Peng, Xizhu Peng, He Tang, Chao Fan, Liang Qi, Rui P. Martins, Mingqiang Guo, A 12.5GS/s 14.7mW 4×TI Pipelined Hybrid TD-SAR ADC with Residual Time-Voltage Amplification

    2025 IEEE Custom Integrated Circuits Conference (CICC)

     Apr-2025
  7. Yuekai Liu, Meng Guo, Yichen Jin, Yan Liu, Mingqiang Guo, A 5.76GS/s 180MHz-BW 74.1dB-DR 2x TI Extrapolated CT DSM with Broadband Hybrid-Inputs Current-Mode Adder in 28nm CMOS

    2024 IEEE Asian Solid-State Circuits Conference (A-SSCC)

     Nov-2024
  8. Ran Zhang, Ka-Fai Un, Zhensheng Li, Mingqiang Guo, Invited Paper: A Ping-Pong Analog Delta Generator for Delt-Sigma Computing-In-Memory SRAM Macro for Edge AI Processing

    2024 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)

     Oct-2024
  9. Mingqiang Guo, Dongyang Jiang, Shulin Zhao, Sai-Weng Sin and Rui P. Martins, When Time Interleaving Encounters Oversampling in ADC

    2024 IEEE 17th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)

     Oct-2024
  10. Ran Zhang, Ka-Fai Un, Mingqiang Guo, Liang Qi, Dengke Xu, Weibing Zhao, R. P. Martins, Franco Maloberti and Sai-Weng Sin, A Delta-Sigma-Based Computing-In-Memory Macro Targeting Edge Computation

    IEEE International Symposium on Circuits and Systems (ISCAS)

     May-2024
  11. Ke Li, Xianyu Congzhou, Liang Qi, Mingqiang Guo, Rui P. Martins and Sai-Weng Sin, A 160MHz-BW 68dB-SNDR 30.8mW Continuous-Time Pipeline DSM with Correlative Passive Low-Pass Filters and DAC Image Pre-Filtering

    IEEE Custom Integrated Circuits Conference (CICC)

     Apr-2024
  12. Haoyu Gong, Wen-Liang Zeng, Mingqiang Guo, Chi-Seng Lam, Shulin Zhao, Rui Paulo Martins and Sai-Weng Sin, A 75dB-SNDR 10MHz-BW 2-Channel Time-Interleaved Noise-Shaping SAR ADC Directly Powered by an On-Chip DC-DC Converter

    IEEE Custom Integrated Circuits Conference (CICC)

     Apr-2024
  13. Mingqiang Guo, Sai -Weng Sin, Liang Qi, Gangjun Xiao and Rui P. Martins, A 10b 700MS/s single-channel 1b/cycle SAR ADC using a monotonic-specific feedback SAR logic with power-delay-optimized unbalanced N/P-MOS sizing

    2022 IEEE Custom Integrated Circuits Conference (CICC)

     Aug-2023
  14. Shunlin Zhao, Mingqiang Guo, et al., A 3.07 mW 30 MHz-BW 73.2 dB-SNDR Time- Interleaved Noise-Shaping SAR ADC With Self-Coupling Second-Order Error-Feedforward

    IEEE Journal of Solid-State Circuits

     May-2023
  15. Shunlin Zhao, Mingqiang Guo, A 3.07mW 30MHz-BW 73.5dB-SNDR Time-Interleaved Noise-Shaping SAR ADC with 2nd-order Error-Feedforward and Redundancy-Bit Reduction

    2022 IEEE Asian Solid-State Circuits Conference (A-SSCC)

     Oct-2022
  16. Mingqiang Guo, Sai-Weng Sin, Rui P. Martins, Background Timing-Skew Mismatch Calibration for Time-Interleaved ADCs

    2021 International SoC Design Conference (ISOCC), pp 248-249

     Oct-2021
  17. Mingqiang Guo, Sai-Weng Sin, Rui P. Martins, Background Timing-Skew Mismatch Calibration for Time-Interleaved ADCs

    2021 18th International SoC Design Conference (ISOCC), Jeju Island

     Oct-2021
  18. Mingqiang Guo, Jiaji Mao, Sai Weng Sin, Hegong Wei, R. P. Martins, A 29mW 5GS/s Time-interleaved SAR ADC achieving 48.5dB SNDR With Fully-Digital Timing-Skew Calibration Based on Digital-Mixing

    IEEE Symposium on VLSI Circuits (VLSI)

     Jun-2019
  19. Mingqiang Guo, Jiaji Mao, Sai-Weng Sin, Hegong Wei, Rui P. Martins, M. Guo, J. Mao, S. Sin, H. Wei and R. P. Martins, A 10b 1.6GS/s 12.2mW 7/8-way Split Time-interleaved SAR ADC with Digital Background Mismatch Calibration

    2019 IEEE Custom Integrated Circuits Conference (CICC)

     Apr-2019
  20. Mingqiang Guo, Jiaji Mao, Sai Weng Sin, Hegong Wei, R. P. Martins, A 1.6GS/s 12.2mW 7/8-way Split Time-interleaved SAR ADC with Digital Background Mismatch Calibration

    IEEE Custom Integrated Circuits Conference (CICC)

     Apr-2019
  21. Jiaji Mao, Mingqiang Guo, Sai Weng Sin, R. P. Martins, A 14-bit Split Pipeline ADC with Self-Adjusted Opamp-Sharing Duty Cycle

    IEEE International Solid-State Circuits Conference – ISSCC 2018

     Ph.D. Student Research Preview - Session 3, Paper No.7 Feb-2018
  22. Mingqiang Guo, Sai Weng Sin, Seng-Pan U, R. P. Martins, Split-based time-interleaved ADC with digital background timing-skew calibration

    2017 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)

     Jun-2017
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