Liang Qi - University of Macau | State Key Laboratory of Analog and Mixed-Signal VLSI

奖项 Total:0

专利与技术转移 Total:0

期刊和杂志 Total:6

Hongjiang Chen, Yuhang Peng, Liang Qi, Biao Wang, Sai-Weng Sin, Rui P. Martins and Mingqiang Guo, A 12-Bit 1-Gs/S 5.1-mW Pipelined ADC Using an Open-Loop Floating Inverter Amplifier with Residue-Dependent Integration Time Compensation
IEEE Journal of Solid-State Circuits
vol. 58, Early Access Nov-2025
Xinyu Qin, Yichen Jin, Mingqiang Guo, Guoxing Wang, Sai-Weng Sin, Maurits Ortmanns, Yong Lian, Liang Qi, Analysis and Design of a Pipelined MASH Continuous-Time Delta-Sigma Modulator With 15.4 MHz-BW and 82.6 dB-SNDR
IEEE Transactions on Circuits and Systems I: Regular Papers
Early Access Aug-2025
Ke Li, Liang Qi, Mingqiang Guo, Rui P. Martins and Sai-Weng Sin, Wideband Continuous-Time MASH ADCs: Principles, Challenges, and Prospects
IEEE Open Journal of the Solid-State Circuits Society
Feb-2025
Ke Li, Haoyu Gong, Congzhou Xianyu, Zhensheng Li, Liang Qi, Mingqiang Guo, Rui P. Martins, Sai-Weng Sin, A 160-MHz BW 68-dB SNDR 36.2 mW Continuous-Time Pipelined ΔΣ ADC With DAC Image Prefiltering
IEEE Journal of Solid-State Circuits
vol. 60, no. 3, pp. 838-849 Dec-2024
Mingqiang Guo, Liang Qi, Weibing Zhao, Gangjun Xiao, Rui P. Martins and Sai -Weng Sin, A 10b 700 MS/s Single-Channel 1b/Cycle SAR ADC Using a Monotonic-Specific Feedback SAR Logic With Power-Delay-Optimized Unbalanced N/P-MOS Sizing
IEEE Transactions on Circuits and Systems I: Regular Papers
Aug-2023
Mingqiang Guo, Sai -Weng Sin, Liang Qi, Dengke Xu, Guoxing Wang and Rui P. Martins, Background Timing Mismatch Calibration Techniques in High-Speed Time-Interleaved ADCs: A Tutorial Review
IEEE Transactions on Circuits and Systems II: Express Briefs
Mar-2022

会议报告和简报 Total:9

Baolong Huang, Hongjiang Chen, Jingxiang Wang, Yutao Peng, Zhifei Lu, Xizhu Peng, He Tang, Liang Qi, Yawei Guo, Sai-Weng Sin, Rui P. Martins, and Mingqiang Guo, A 3.4 mW 64.5 dB SNDR 800MS/s Pipelined-SAR/TDC ADC with Parallel Amplification and Quantization
2025 IEEE Asian Solid-State Circuits Conference (A-SSCC)
Nov-2025
Hongjiang Chen, Yuhang Peng, Liang Qi, Biao Wang, Sai-Weng Sin, Rui P. Martins and Mingqiang Guo, A 12-Bit 1-Gs/S 5.1-mW Pipelined ADC Using an Open-Loop Floating Inverter Amplifier with Residue-Dependent Integration Time Compensation
2025 IEEE European Solid-State Electronics Research Conference (ESSERC)
Sep-2025
Haoyu Li, Kaize Zhang, Liang Qi, Sai-Weng Sin, Rui P. Martins and Mingqiang Guo, A PVT-Robust 16GS/s 4×TI Time-Domain ADC with Vernier-Based Multipath Flash TDC Achieving 25.7fJ/c-s FoM in 28nm CMOS
2025 Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
Jun-2025
Haoyu Li, Boyang Wang, Hongjiang Chen, Sai-Weng Sin, Yutao Peng, Xizhu Peng, He Tang, Chao Fan, Liang Qi, Rui P. Martins, Mingqiang Guo, A 12.5GS/s 14.7mW 4×TI Pipelined Hybrid TD-SAR ADC with Residual Time-Voltage Amplification
2025 IEEE Custom Integrated Circuits Conference (CICC)
Apr-2025
Ran Zhang, Ka-Fai Un, Mingqiang Guo, Liang Qi, Dengke Xu, Weibing Zhao, R. P. Martins, Franco Maloberti and Sai-Weng Sin, A Delta-Sigma-Based Computing-In-Memory Macro Targeting Edge Computation
IEEE International Symposium on Circuits and Systems (ISCAS)
May-2024
Ke Li, Xianyu Congzhou, Liang Qi, Mingqiang Guo, Rui P. Martins and Sai-Weng Sin, A 160MHz-BW 68dB-SNDR 30.8mW Continuous-Time Pipeline DSM with Correlative Passive Low-Pass Filters and DAC Image Pre-Filtering
IEEE Custom Integrated Circuits Conference (CICC)
Apr-2024
Mingqiang Guo, Sai -Weng Sin, Liang Qi, Gangjun Xiao and Rui P. Martins, A 10b 700MS/s single-channel 1b/cycle SAR ADC using a monotonic-specific feedback SAR logic with power-delay-optimized unbalanced N/P-MOS sizing
2022 IEEE Custom Integrated Circuits Conference (CICC)
Aug-2023
Liang Qi, Xinyu Qin, Sai-Weng Sin, Chixiao Chen, Fan Ye, Guoyong Shi, Guoxing Wang, Advances in Continuous-time MASH ΔΣ Modulators
2021 IEEE International Conference on ASIC (ASICON)
Oct-2021
Xinyu Qin; Jingying Zhang; Liang Qi; Sai-Weng Sin; Rui P. Martins; Guoxing Wang, Discrete-Time MASH Delta-Sigma Modulator with Second-Order Digital Noise Coupling for Wideband High-Resolution Application
2021 IEEE International Symposium on Circuits and Systems
May-2021

书籍及书籍章节 Total:0