无线IC

Xiaoteng Zhao, Yong Chen, Pui In Mak, R. P. Martins, A 0.0285mm2 0.68pJ/bit Single-Loop Full-Rate Bang-Bang CDR without Reference and Separate Frequency Detector Achieving an 8.2(Gb/s)/µs Acquisition Speed of PAM-4 data in 28nm CMOS

IEEE Custom Integrated Circuits Conference (CICC)

Mar-2020

Chao Fan, Jun Yin, Chee-Cheow Lim, Pui In Mak, R. P. Martins, A 9mW 54.9-to-63.5GHz Current-Reuse LO Generator with a 186.7dBc/Hz FoM by Unifying a 20GHz 3rd Harmonic-Rich Current-Output VCO, a Harmonic-Current Filter and a 60GHz TIA

IEEE International Solid-State Circuits Conference (ISSCC)

pp. 282-284 Feb-2020

Gengzhen Qi, Haijun Shao, Pui In Mak, Jun Yin, R. P. Martins, A 1.4-to-2.7GHz FDD SAW-less Transmitter for 5G-NR Using a BW-Extended N-Path Filter-Modulator, an Isolated-BB Input and a Wideband TIA-Based PA Driver Achieving <-157.5dBc/Hz OB Noise

IEEE International Solid-State Circuits Conference (ISSCC)

Digest., pp. 172-173 Feb-2020

Ka-Meng Lei, Dongwan Ha, Yi-Qiao Song, Robert Westervelt, R. P. Martins, Pui In Mak, Donhee Ham, Portable NMR with Parallelism

ACS Analytical Chemistry

2020, 92, 2, 2112–2120 Jan-2020

Haohong Yu, Yong Chen, Chirn Chye Boon, Pui In Mak, R. P. Martins, A 0.096-mm2 1-to-20-GHz Triple-Path Noise-Cancelling Common-Gate Common-Source LNA with Complementary pMOS-nMOS Configuration

IEEE Transactions on Microwave Theory and Techniques

vol. 68, pp. 144-159 Jan-2020

Zunsong Yang, Yong Chen, Shiheng Yang, Pui In Mak, R. P. Martins, A 10.6-mW 26.4-GHz Dual-Loop Type-II Phase-Locked Loop Using Dynamic Frequency Detector and Phase Detector

IEEE Access

vol. 8, pp. 2222–2232 Jan-2020

Ka-Fai Un, Feifei Zhang, Pui In Mak, R. P. Martins, Anding Zhu, Robert Bogdan Staszewski, Design Considerations of the Interpolative Digital Transmitter for Quantization Noise and Replicas Rejection

IEEE Transactions on Circuits and Systems – II

vol. 67, pp. 37–41 Jan-2020

Chao Fan, Wei-Han Yu, Pui In Mak, R. P. Martins, A 40-Gb/s PAM-4 Transmitter Using a 0.16-pJ/bit SST-CML-Hybrid (SCH) Output Driver and a Hybrid-Path 3-Tap FFE Scheme in 28-nm CMOS

IEEE Transactions on Circuits and systems - I

vol. 66, No.12, pp. 4850–4861, Dec-2019

Xiaoteng Zhao, Yong Chen, Pui In Mak, R. P. Martins, A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery Circuit (BBCDR) in 28-nm CMOS

IEEE Asia Pacific Conference on Circuits and Systems

Nov-2019

Xiaoteng Zhao, Yong Chen, Pui In Mak, R. P. Martins, Best Paper Award

IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

Nov-2019