2024-01-11T16:57:33+08:002024-01-11|新闻与活动, 活动信息|

The Distinguished Lecture on “Chiplet Design and Heterogeneous Integration Packaging” will take place as follows:

Date: 16 January 2024 (Tue)

Time: 11:00 am to 12:30 pm

Venue: Research Building N21, G013

The speaker is:

Dr. John H. Lau, Unimicron Technology Corporation

 

The Lecture is:

Chiplet Design and Heterogeneous Integration Packaging

 

Lecturer: 

Dr. John H. Lau,

Unimicron Technology Corporation,

IEEE fellow, IMAPS fellow, and ASME fellow

With more than 40 years of R&D and manufacturing experience in semiconductor packaging

Dr. John Lau has published more than 517 peer-reviewed papers (375 are the principal investigator), 52 issued and pending US patents (30 are the principal inventor), and 23 textbooks (all are the first author), e.g. Chiplet Design and Heterogeneous Integration Packaging (525 pages, Springer, 2023).

Actively participating in industry, academy, society meetings and conferences to contribute, learn and share.

 

Topics:

  • System-on-Chip (SoC)
  • Why Chiplet Design?
  • Chiplet Design and Heterogeneous Integration Packaging – Chip Partition and Chip Split
    • Chip Partition and Heterogeneous Integration
    • Chip Split and heterogeneous Integration
    • Advantages and Disadvantages
  • Lateral Communication Between Chiplets (e.g., Bridges)
    • Bridges Embedded in Build-up Package Substrate
    • Bridges Embedded in Fan-Out EMC with RDLs
    • UCIe
    • Hybrid Bonding Bridge
  • Chiplet Design and Heterogeneous Integration Packaging – Multiple System and Heterogeneous Integration
    • Multiple System and Heterogeneous Integration with Package Substrate (2D IC Integration)
    • Multiple System and Heterogeneous Integration with Thin Film layer on the Package Substrate (2.1D IC Integration)
    • Multiple System and Heterogeneous Integration with TSV-less (Organic) Interposer (2.3D IC Integration)
    • Multiple System and Heterogeneous Integration with Passive TSV-Interposer (2.5D IC Integration)
    • Multiple System and Heterogeneous Integration with Active TSV-Interposer (3D IC Integration)
  • Summary
  • Potential R&D Topics in Chiplet Design and Heterogeneous Integration Packaging
  • Trends in Chiplet Design and Heterogeneous Integration Packaging

 

For more details, kindly find the event poster.