发表 著作

Yan Song, Yan Zhu, Chi Hang Chan, R. P. Martins, A 2.56mW 40MHz-Bandwidth 75dB-SNDR PartialInterleaving SAR-Assisted NS Pipeline ADC With Background Inter-Stage Offset Calibration

IEEE International Solid-State Circuits Conference (ISSCC)

pp.164-166 Feb-2020

Yadong Yin, Kamal El-Sankary, Zhizhang Chen, Yueming Gao, Mang I Vai, Sio Hang Pun, An Intermittent Frequency Synthesizer With Accurate Frequency Detection for Fast Duty-Cycled Receivers

IEEE Access

vol. 8, pp. 45148–45155 Feb-2020

Mo Huang, Yan Lu, R. P. Martins, A 2-Phase Soft-Charging Hybrid Boost Converter with Doubled-Switching Pulse Width and Shared Bootstrap Capacitor Achieving 93.5% Efficiency at a Conversion Ratio of 4.5

IEEE International Solid-State Circuits Conference (ISSCC)

pp. 198-200 Feb-2020

Ka-Meng Lei, Dongwan Ha, Yi-Qiao Song, Robert Westervelt, R. P. Martins, Pui In Mak, Donhee Ham, Portable NMR with Parallelism

ACS Analytical Chemistry

2020, 92, 2, 2112–2120 Jan-2020

Haohong Yu, Yong Chen, Chirn Chye Boon, Pui In Mak, R. P. Martins, A 0.096-mm2 1-to-20-GHz Triple-Path Noise-Cancelling Common-Gate Common-Source LNA with Complementary pMOS-nMOS Configuration

IEEE Transactions on Microwave Theory and Techniques

vol. 68, pp. 144-159 Jan-2020

Zunsong Yang, Yong Chen, Shiheng Yang, Pui In Mak, R. P. Martins, A 10.6-mW 26.4-GHz Dual-Loop Type-II Phase-Locked Loop Using Dynamic Frequency Detector and Phase Detector

IEEE Access

vol. 8, pp. 2222–2232 Jan-2020

Ka-Fai Un, Feifei Zhang, Pui In Mak, R. P. Martins, Anding Zhu, Robert Bogdan Staszewski, Design Considerations of the Interpolative Digital Transmitter for Quantization Noise and Replicas Rejection

IEEE Transactions on Circuits and Systems – II

vol. 67, pp. 37–41 Jan-2020

XiaojieYang, Peng Sun, Jian-Ping Wu, Weitao Jiang, Mang I Vai, Sio Hang Pun, Cheng Peng, Fangyi Chen, Nondestructive and objective assessment of the vestibular function in rodent models: A review

Neurosci. Lett.

vol. 717, p. 134608, 2020 Jan-2020

Chao Fan, Wei-Han Yu, Pui In Mak, R. P. Martins, A 40-Gb/s PAM-4 Transmitter Using a 0.16-pJ/bit SST-CML-Hybrid (SCH) Output Driver and a Hybrid-Path 3-Tap FFE Scheme in 28-nm CMOS

IEEE Transactions on Circuits and systems - I

vol. 66, No.12, pp. 4850–4861, Dec-2019

Xiaoteng Zhao, Yong Chen, Pui In Mak, R. P. Martins, A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery Circuit (BBCDR) in 28-nm CMOS

IEEE Asia Pacific Conference on Circuits and Systems

Nov-2019