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ISSCC Silkroad Award
IEEE International Solid-State Circuits Conference (ISSCC)
Feb-2016 -
Travel Grant Award (A 3.8mW 8b 1GS/s 2b/cycle Interleaving SAR ADC with Compact DAC Structure)
2012 IEEE Symposium on VLSI Circuits – VLSI 2012
Jun-2012 -
IEEE A-SSCC Student Design Contest Best Design Award (A 35 fJ 10b 160 MS/s Pipelined-SAR ADC with Decoupled Flip-Around MDAC and Self-Embedded Offset Cancellation)
IEEE Asian Solid-State Circuits Conference
Nov-2011 -
Silk-Road Award (A 0.024mm2 8-bit 400 MS/s SAR ADC with 2-bit per Cycle and Resistive DAC in 65 nm CMOS)
Digest of Technical Papers from IEEE International Solid-State Circuits Conference – ISSCC 2011
[Awarded for best asian PhD student research in ISSCC (“World Chip Olympic”)] Feb-2011
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Single-Loop Linear-Exponential Multi-Bit Incremental Analog-to-Digital Converter
No. 10,644,718 B1
US Patent
Jul-2020 -
Analog to Digital Converter Circuit
Granted Number: 201242261
Application Number: 100107757
Taiwan Patent
Mar-2014 -
Cascade Analog to Digital Converting System
Granted Number: 8,466,823
Application Number: 13/198,856
US Patent
Jun-2013 -
A Time-Inteleaved Piplined-SAR Analog to Digital Converter with Low Power Consumption
Granted Number: 8,427,355
Application Number: 13/232,442
US Patent
Apr-2013 -
N-Bits Successive Approximation Register Analog-to-Digital Converting System
Granted Number: 8,344,931
Application Number: 13/150,508
US Patent
Jan-2013
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A SAR-ADC-Assisted DC-DC Converter with Fast Transient Recovery
IEEE Transactions on Circuits and Systems II - Express Briefs (TCAS-II)
Sep-2020
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A 10.4mW 50MHz-BW 80dB-DR Single-Opamp Third-Order CTSDM with SABELD-Merged Integrator and 3-Stage Opamp
VLSI 2020
Jun-2020 -
A 5MHz-BW, 86.1dB-SNDR 4X Time-Interleaved 2nd-order ΔΣ Modulator with Digital Feedforward Extrapolation in 28nm CMOS
2020 Symposium on VLSI Circuits Digest of Technical Papers
Jun-2020 -
A Power-Efficient Hybrid Single-Inductor Bipolar-Output DC-DC Converter with Floating Negative Output for AMOLED Displays
CICC 2020
Mar-2020 -
A 5MHz-BW, 86.1dB-SNDR 4X Time-Interleaved 2nd-order ÄÓ Modulator with Digital Feedforward Extrapolation in 28nm CMOS
CICC 2020
Mar-2020 -
A 550μW 20kHz BW 100.8dB SNDR Linear-Exponential Multi-Bit Incremental Converter with 256-cycles in 65nm CMOS
Proc. IEEE Symposium on VLSI Circuits - VLSI 2018
Jun-2018 -
A Handheld High Sensitivity Micro-NMR CMOS Platform with B-Field Stabilization for Multi-Type Biological/Chemical Assays
IEEE Journal of Solid-State Circuit
vol. 52, no. 1, pp. 284-297 [Invited Paper] Jan-2017