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Yunbo Huang

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Yunbo Huang
黃雲波 Yunbo Huang
  1. Yunbo Huang, Yong Chen, Hailong Jiao, Pui-In Mak and Rui P. Martins, A 3.36-GHz Locking-Tuned Type-I Sampling PLL with -78.6-dBc Reference Spur Merging Single-Path Reference-Feedthrough-Suppression and Narrow-Pulse-Shielding Techniques

    IEEE Transactions on Circuits and Systems II: Express Briefs

     vol. 68, No.9,pp. 3093-3097 Sep-2021
  2. Yong Chen, Zunsong Yang, Xiaoteng Zhao, Yunbo Huang, A 6.5×7 µm2 0.98-to-1.5 mW Non-Self-Oscillation-Mode Frequency Divider-by-2 Achieving a Single-Band Untuned Locking Range of 166.6% (4 to 44 GHz)

    IEEE Solid-State Circuits Letters

     Vol.2, Issue: 5, pp. 37-40 May-2019
  1. Hao Guo, Yong Chen, Yunbo Huang, Pui-In Mak and Rui P. Martins, An 83.3-to-104.7GHz Harmonic-Extraction VCO Incorporating Multi-resonance, Multi-core and Multi-mode (3M) Techniques Achieving -124dBc/Hz Absolute PN and 190.7dBc/Hz FOMT

    2023 IEEE International Solid-State Circuits Conference (ISSCC)

     Feb-2023
  2. Yunbo Huang, Yong Chen, Pui-In Mak, and Rui P. Martins, A 3.52-GHz Harmonic-Rich-Shaping VCO with Noise Suppression and Circulation Achieving -151-dBc/Hz Phase Noise at 10-MHz Offset

    2021 IEEE International Symposium on Circuits and Systems

     May-2021
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