Date and Time: 7th December 2012 (Friday), 11:30 AM
Venue: HG01, Ho Yin Convention Center, University of Macau
Abstract
Advanced telecommunications, data storage, military, health, and other “information- sensitive” technologies have accented cryptography as an important design and security factor. The lecture addresses the application framework and design implementation challenges of modern cryptographic applications and illustrates various cryptography implementation solutions. New hardware designs for cryptography are presented and the impact of recent algorithmic and mathematical advances in computer arithmetic and alternative number system representations on cryptography are discussed. The lecture also attempts to offer directions towards a more qualitative work model for future cryptography hardware system researchers and designers, by showcasing the added scientific value inherent in mathematical and algorithmic improvements rather than on mere hardware optimization techniques or exploitation of certain capabilities of state-of-the-art FPGA devices.
Biography
Dr. Thanos Stouraitis, an IEEE Fellow for his “contributions in digital signal processing architectures and computer arithmetic,” is a Professor of the ECE Dept. at the University of Patras, Greece, where he directs the Signal and Image Processing Laboratory. He is President of the IEEE Circuits and Systems Society for 2012-3.
He has served as a member of the founding AdCom of the University of Sterea Hellas in Greece. He has served on the faculty of The Ohio State University and has visited the University of Florida, the New York Polytechnic University, and the University of British Columbia.
He got his Ph.D. in Electrical Engineering from the University of Florida, an M.Sc. from the University of Cincinnati, an M.S. from the University of Athens, Greece, and a B.S. in Physics from the University of Athens, Greece.
His current research interests include signal and image processing systems, application-specific processor technology and design, computer arithmetic, and design and architecture of optimal digital systems with emphasis on cryptographic systems.
He has authored more than 180 technical papers as well as several books and book chapters and holds one patent on DSP processor design. He has led several DSP processor design projects funded by the European Union, American organizations, and the Greek government and industry.
He served as Editor for various Journals and IEEE Transactions. He reviews proposals for NSF, the European Commission, and other agencies. He has served as the general chair of IEEE ISCAS 2006 and several other IEEE conferences.
He has received several awards, including the IEEE Guillemin-Cauer Award