Date: 13 April, 2015
Time: 11:30am-12:45noon
Venue: Library Auditorium, G/F of UM Wu Yee Sun Library (E2)
Language: English
Target Audience: All are welcome
Power Minimization in Amplifiers and Filters
Abstract:
Channel lengths of standard CMOS technologies continue to shrink, as predicted by Moore. Consequently, amplifiers and filters require the biasing points of the transistors to move deeper and deeper in weak inversion. As a result the speed is reduced considerably.
In this presentation a new design procedure is derived in all three regions of operation i.e. strong and weak inversion and velocity saturation. BSIM6/EKV model parameters are used such as the Inversion Coefficient for weak inversion and lambdaC for velocity saturation. Optimum biasing points are derived for single-stage amplifiers. It is shown that for channel lengths below 45 nm, an optimum exists for the fT x gm/IDS figure of merit.
At such low channel lengths noise and distortion establish severe limitations in dynamic range. They can be mitigated by the use of negative resistors, as used in an increasing number of amplifier and filter configurations. An overview is given of such circuit configurations.
Biography:
Prof. Willy Sansen has a PhD degree from the University of California, Berkeley in 1972. Since 1980 he has been full professor at the Catholic University of Leuven, in Belgium, where he has headed the ESAT-MICAS laboratory on analog design from 1984 to 2008. He has been supervisor of 63 PhD theses and has authored and coauthored more than 635 publications and sixteen books, among which the slide based “Analog Design Essentials” (Springer 2006). He was program chair of the ISSCC-2002 conference and is now Past-President of the IEEE Solid-State Circuits Society. In 2011 he received the D.O Pederson Award from the IEEE Solid-State Circuits Society. He is a Life Fellow of the IEEE.