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Seng-Pan U, R. P. Martins, J.E.Franca, Highly Accurate Mismatch-Free SC Delay Circuits with Reduced Finite Gain and Offset Sensitivity

in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS)

 Vol. 2, pp 57-60 May-1999
Seng-Pan U, Research Scholarship

Fundação Oriente

 Apr-1999
Seng-Pan U, Certificate of Merit

Institution of Electrical Engineers (IEE) for IEE (HK) Younger Members Section Paper Contest 97/98 (Postgraduate Session)

 Apr-1999
Seng-Pan U, R. P. Martins, J.E.Franca, Offset-& Gain-Compensated and Mismatch-Free SC Delay Circuit with Flexible Implementation

IEE Electronics Letters

 Vol. 35, Issue 3, pp 188-189 Feb-1999
Seng-Pan U, R. P. Martins, J.E.Franca, A Novel Half-Band SC Architecture for Effective Analog Impulse Sampled Interpolation

in Proc. of IEEE International Conference on Electronics, Circuits and Systems (ICECS)

 vol.1, pp 389-393 Sep-1998
Seng-Pan U, A Novel Impulse Sampled Interpolation Technique for Efficient and Accurate Analog Multirate Signal Processing

in Proc. of The 3rd China Association for Science and Technology (CAST) Conference of Young Scientists

 Aug-1998
Seng-Pan U, Certificate of Merit

Institute of Electrical and Electronic Engineers (IEEE) for 1998 IEEE Postgraduate Student Paper Contest

 Apr-1998
Seng-Pan U, R. P. Martins, J.E.Franca, Impulse Sampled FIR Interpolation with SC Active-Delayed Block Polyphase Structures

IEE Electronics Letters

 vol. 34, Issue 5, pp. 443-444 Mar-1998
Seng-Pan U, R. P. Martins, J.E.Franca, Impulse sampled intermittent polyphase SC FIR rational decimators with double-sampling

in Proc. of IEEE Midwest Symposium on Circuits and Systems

 Vol. 2, pp 977-980 Aug-1997
Seng-Pan U, R. P. Martins, J.E.Franca, Intermittent Polyphase SC Structures for FIR Rational Interpolation

in Proc. of IEEE International Symposium on Circuits and Systems 1997 (ISCAS)

 Vol. 1, pp 121-124 Jun-1997
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