发表 著作

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Sai Weng Sin, Seng-Pan U, R. P. Martins, Selected Student Paper Scholarship (Paper Title I: Sai-Weng Sin, Seng-Pan U and R.P.Martins, “A Novel Low-Voltage Cross-Coupled Passive Sampling Branch for Reset- and Switched-Opamp Circuits”, Paper Title II: Sai-Weng Sin, Seng-Pan U and R.P.Martins, “A Novel Very Low-Voltage SC-CMFB Technique for Fully-Differential Reset-Opamp Circuits” )

IEEE International Symposium on Circuits and Systems (ISCAS)

May-2005
Ka Hou Ao Ieong, Chong-Yin Fok, Pui In Mak, Seng-Pan U, R. P. Martins, A Frequency Up-Conversion and Two-Step Channel Selection Embedded CMOS D/A Interface

in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS)

vol. 1, pp. 392-395 May-2005
Sai Weng Sin, Seng-Pan U, R. P. Martins, A Novel Low-Voltage Cross-Coupled Passive Sampling Branch for Reset- and Switched-Opamp Circuits

in Proc.of IEEE International Symposium on Circuits and Systems (ISCAS)

vol. 2, pp. 1585-1588 May-2005
Kin-Sang Chio, Seng-Pan U, R. P. Martins, A robust 3rd order low-distortion multi-bit sigma-delta modulator with reduced number of op-amps for WCDMA

in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS)

pp. 3099-3102 May-2005
Weng Ieng Mok, Pui In Mak, Seng-Pan U, R. P. Martins, Merit Paper Award (On-Chip Unsteady Reference Voltage Compensation Techniques for Very-High-Speed Pipelined ADC)

awarded from The 2005 Regional Inter-University Postgraduate Electrical and Electronic Engineering Conference (RIUPEEEC)

Apr-2005
Seng-Pan U, Lecture Fellowship

K. C. Wong Education Foundation

Apr-2005
Seng-Pan U, Nomination of “The 2005 National Best Doctoral Dissertations”

the Ministry of Education and State Academic Degrees Committee of the State Council.

Apr-2005
Seng-Pan U, FST Teaching Award 2004

University of Macau

Apr-2005
Sai Weng Sin, Seng-Pan U, R. P. Martins, Novel Low Jitter Multi-Phase Clock Generation Scheme for Parallel Analog-to-Digital Conversion Systems

Proc. IEEE/IEEJapan International Analog VLSI Workshop – AVLSIWS 2004

pp. 172-175 Oct-2004
Pui In Mak, Ka Hou Ao Ieong, Chong-Yin Fok, Seng-Pan U, R. P. Martins, A Complex Low-IF Transceiver Architecture for Relaxing Phase Noise and Settling Time Requirements of RF PLL-FS

in Proc. of IEEJ (7th) International Analog VLSI Workshop (AVLSIWS)

pp. 221-226 Oct-2004
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