期刊和杂志

Yong Chen, Pui In Mak, Li Zhang, He Qian, Yan Wang, Pre-Emphasis Transmitter (0.007mm2, 8Gbit/s, 0-14dB) with Improved Data Zero-Crossing Accuracy in 65nm CMOS

IET Electronics Letters

vol. 49, no. 15, pp. 929-930 Jul-2013

ChenYan Cai, Yang Jiang, Sai Weng Sin, Seng-Pan U, R. P. Martins, Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active-passive loop-filters

Analog Integrated Circuits and Signal Processing, Springer

Vol.76, Issue1, pp 35-46 Jul-2013

Md. Tawfiq Amin, Pui In Mak, R. P. Martins, A 3.6mW 6GHz Current-Reuse VCO-Buffer with Improved Load Drivability in 65nm CMOS

Wiley International Journal of Circuit Theory and Applications

Jun-2013

Yong Chen, Pui In Mak, Li Zhang, He Qian, Yan Wang, A 0.0012mm2, 8mW, Single-to-Differential Converter with <1.1% Data Cross Error and <3.4ps RMS Jitter up to 14Gb/s Data Rate

IET Electronics Letters

vol.49, no. 11, p. 692-694 May-2013

Wai-Hei Choi, Chi-Seng Lam, Man-Chung Wong, Ying-Duo Han, Analysis of DC-link Voltage Controls in Three-Phase Four-Wire Hybrid Active Power Filters

IEEE Transactions on Power Electronics

Vol.28, Issue 5, pp 2180-2091 May-2013

Chenyan Cai, JIANG Yang, Sai Weng Sin, Seng-Pan U, R. P. Martins, Excess-Loop-Delay Compensation Technique for CT Delta Sigma Modulator with Hybrid Active-Passive Loop-Filters

Analog Integrated Circuits and Signal Processing, Vol. 76, Issue 1

May-2013

Keng-Weng Lao, Ning-Yi Dai, Wei-Gang Liu, Man-Chung Wong, Hybrid power quality compensator with minimum dc operation voltage design for high-speed traction power systems

IEEE Transactions on Power Electronics

Vol.28, Issue 4, pp 2024-2036 Apr-2013

Zushu Yan, Pui In Mak, Man-Kay Law, R. P. Martins, A 0.016-mm2 144-µW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load with >0.95-MHz GBW

IEEE Journal of Solid-State Circuits

Vol.48, Issue 2 , pp 527-540 Feb-2013

Xiao-Xi Cui, Chi-Seng Lam, Wei-Han Yu, Wai-Hei Choi, Man-Chung Wong, 三相四线混合有源电力滤波器有源部分最小容量分析

Journal in Automation of Electric Power Systems

Vol.37, no 3, pp. 122-128 Feb-2013

Yong Chen, Pui In Mak, Li Zhang, He Qian, Yan Wang, A Fifth-Order 20-MHz Transistorized- -Ladder LPF With 58.2-dB SFDR, 68- Efficiency, and 0.13- Die Size in 90-nm CMOS

IEEE Transactions on Circuits and Systems – II

Vol.60, Issue 1, pp 11-15 Jan-2013