2011-04-07T00:00:00+08:002011-04-07|活动信息|

Date and Time: 7th April 2011 (Thursday), 14:30 PM

Venue: L105, Luso-Chinese Building, University of Macau

 

Franco Maloberti received the Laurea degree in physics (summa cum laude) from the University of Parma, Parma, Italy, in 1968, and the Doctorate Honoris Causa in electronics from the Instituto Nacional de Astrofisica, Optica y Electronica (Inaoe), Puebla, Mexico, in 1996. He was a Visiting Professor at The Swiss Federal Institute of Technology (ETH-PEL), Zurich, Switzerland and at the EPFL, Lausanne, Switzerland. He was the TI/J.Kilby Chair Professor at the A&M University, Texas and the Distinguished Microelectronic Chair Professor at the University of Texas at Dallas. Presently he is Professor of Microelectronics and Head of the Micro Integrated Systems Group, University of Pavia, Italy. His professional expertise is in the design, analysis, and characterization of integrated circuits and analog digital applications, mainly in the areas of switched-capacitor circuits, data converters, interfaces for telecommunication and sensor systems, and CAD for analog and mixed A/D design. He has written more then 430 published papers on journals or conference proceedings, four books, and holds 30 patents. Dr. Maloberti was the recipient of the XII Pedriali Prize for his technical and scientific contributions to national industrial production, in 1992. He was co-recipient of the 1996 Institute of Electrical Engineers Fleming Premium, the best Paper award, ESSCIRC-2007, and the best paper award, IEEJ Analog Workshop-2007. He was the President of the IEEE Sensor Council from 2002 to 2003 and Vice-President, Region 8, of the IEEE CAS Society from 1995 to 1997 and an Associate Editor of IEEE TCAS-II. Presently he is serving as VP-Publications of the IEEE CAS Society He received the 1999 IEEE CAS Society Meritorious Service Award, the 2000 CAS Society Golden Jubilee Medal, and the 2000 IEEE Millennium Medal. He is an IEEE Fellow. In 2009 he received the title of Honorary Professor of the University of Macau.

Power Efficient Data Converters

Abstract: Portable and nomadic systems require developing power effective and power aware design methodologies for either analog or digital circuits. For data converters, low power and optimal resolution imply a favourable allocation of the noise budget. The noise comes from different sources: quantisation, sampling, clock jitter, spur interference and board interference. The distribution of the available noise power, that becomes lower and lower as the supply diminishes, depends on the specification of the system and it may require one or more extra-bits in the data converter. The noise budget issue is new; it was rarely faced in the past when power was just a concern for limiting the chip temperature.

The growing relevance of power efficiency is demonstrated by the great attention on the figure of merit (FoM) of data converters that, in the past few years, has been reduced by almost two orders of magnitudes. The presentation will show that obtaining power effectiveness is a matter of trade-offs between architecture, design methodologies, and implementation of circuits. Advancements in technology challenge data converter design. In addition to a reduced supply voltage, the worsening of transconductance and output resistance degrades the intrinsic gain and makes it difficult to design high gain op-amps. Noise, both thermal and 1/f, also increases. Moreover, accuracy and linearity of passive and active components is problematic at minimum features. All those limits must be understood and accounted for to ensure effective data converters design. After discussing the above general issues this presentation will describe the design of significant achievements and illustrate their experimental verifications. The given design examples, pertaining data converters operating in different regions of conversion speed and resolution, are a band-pass sigma-delta, a power effective sigma-delta for DVB-H, some digital-assisted sigma-delta schemes and an ultra low-power SAR.

Power Management for Portable Microsystems

Abstract: Power management for portable low power systems has special needs: generation of multiple supply voltages, miniaturization and high efficiency at low currents. The research activity on this area often aims at system with all the components on package and solutions that share the inductor for obtaining multiple supply voltages. This presentation deals with the above point and focuses on design methodologies to obtain multiple outputs and to use of very small inductors. The four possible schemes, buck, boost, and inverting or non-inverting buck-boost, are considered. The key specific problems related to the issue are the inductor current switching scheme, the multiple-loops control, the suitable driving of power switches and, accordingly, the converter power efficiency. All the issues are discussed in details. Moreover, design examples of devices integrated with CMOS technologies and the experimental results are presented.

The miniaturization of dc-dc converter requires using very high switching frequency. This must be achieved while maintaining high efficiency, better than the one of a linear converter. The circuit solution discussed in the tutorial foresee a non conventional loop control that enable operation up to 120-MHz switching frequency with peak power efficiency of 87% for 75% duty cycle and 93% at 60 MHz. The results are confirmed by experimental measurements.

New directions, favored by advancement in packaging that enable 3D and pushed by new needs, like the optimal conversion of solar energy, are briefly discussed